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| author | Suraj Jitindar Singh <sjitindarsingh@gmail.com> | 2017-02-10 16:25:54 +1100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2017-02-22 11:28:28 +1100 |
| commit | 506590836144af7d0de3fc4c691bb5ed49d41645 (patch) | |
| tree | 6a20a486f32dccc9a868447ddbfac291585f8399 /hw/pci-host/prep.c | |
| parent | 18aa49ecf40b002dcaad9ea5491923358f512e72 (diff) | |
| download | qemu-506590836144af7d0de3fc4c691bb5ed49d41645.zip qemu-506590836144af7d0de3fc4c691bb5ed49d41645.tar.gz qemu-506590836144af7d0de3fc4c691bb5ed49d41645.tar.bz2 | |
target/ppc/POWER9: Direct all instr and data storage interrupts to the hypv
The vpm0 bit was removed from the LPCR in POWER9, this bit controlled
whether ISI and DSI interrupts were directed to the hypervisor or the
partition. These interrupts now go to the hypervisor irrespective, thus
it is no longer necessary to check the vmp0 bit in the LPCR.
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/pci-host/prep.c')
0 files changed, 0 insertions, 0 deletions