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authorJan Kiszka <jan.kiszka@siemens.com>2011-02-19 18:56:22 +0100
committerAurelien Jarno <aurelien@aurel32.net>2011-02-21 15:46:53 +0100
commitee951a37d8873bff7aa58e23222dfd984111b6cb (patch)
treec8304bedb44ce8b6f69877547c34d521923b74eb /hw/pc_piix.c
parent7096a96db2d0227598e3c9fb154e53f912a34da8 (diff)
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isa-bus: Remove bogus IRQ sharing check
Nothing prevented IRQ sharing on the ISA bus in principle. Not all boards supported this, neither each and every card nor driver and OS. Still, there existed valid IRQ sharing scenarios, (at least) two of them can also be found in QEMU: >2 PC UARTs and the PREP IDE buses. So remove this artificial restriction from our ISA model. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'hw/pc_piix.c')
-rw-r--r--hw/pc_piix.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/pc_piix.c b/hw/pc_piix.c
index b4ca9ec..b3ede89 100644
--- a/hw/pc_piix.c
+++ b/hw/pc_piix.c
@@ -113,7 +113,7 @@ static void pc_init1(ram_addr_t ram_size,
}
isa_bus_irqs(isa_irq);
- pc_register_ferr_irq(isa_reserve_irq(13));
+ pc_register_ferr_irq(isa_get_irq(13));
pc_vga_init(pci_enabled? pci_bus: NULL);
@@ -169,7 +169,7 @@ static void pc_init1(ram_addr_t ram_size,
smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
/* TODO: Populate SPD eeprom data. */
smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
- isa_reserve_irq(9), *cmos_s3, *smi_irq,
+ isa_get_irq(9), *cmos_s3, *smi_irq,
kvm_enabled());
for (i = 0; i < 8; i++) {
DeviceState *eeprom;