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author | Andreas Färber <afaerber@suse.de> | 2013-01-18 15:19:06 +0100 |
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committer | Andreas Färber <afaerber@suse.de> | 2013-02-01 01:35:43 +0100 |
commit | cc36a7a2c7e281d7d715ac73d31bbccc0d2d2670 (patch) | |
tree | 85f8d8c8a7789f7e5ab82ebee6db7fb9bdc976b3 /hw/pc.c | |
parent | eeb266ded886185d1d3b0d8bc089ec72df1a2bfd (diff) | |
download | qemu-cc36a7a2c7e281d7d715ac73d31bbccc0d2d2670.zip qemu-cc36a7a2c7e281d7d715ac73d31bbccc0d2d2670.tar.gz qemu-cc36a7a2c7e281d7d715ac73d31bbccc0d2d2670.tar.bz2 |
target-i386: Pass X86CPU to cpu_x86_set_a20()
Prepares for cpu_interrupt() changing argument to CPUState.
While touching it, rename to x86_cpu_...() now that it takes an X86CPU.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'hw/pc.c')
-rw-r--r-- | hw/pc.c | 7 |
1 files changed, 4 insertions, 3 deletions
@@ -527,11 +527,11 @@ type_init(port92_register_types) static void handle_a20_line_change(void *opaque, int irq, int level) { - CPUX86State *cpu = opaque; + X86CPU *cpu = opaque; /* XXX: send to all CPUs ? */ /* XXX: add logic to handle multiple A20 line sources */ - cpu_x86_set_a20(cpu, level); + x86_cpu_set_a20(cpu, level); } int e820_add_entry(uint64_t address, uint64_t length, uint32_t type) @@ -1085,7 +1085,8 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, } } - a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 2); + a20_line = qemu_allocate_irqs(handle_a20_line_change, + x86_env_get_cpu(first_cpu), 2); i8042 = isa_create_simple(isa_bus, "i8042"); i8042_setup_a20_line(i8042, &a20_line[0]); if (!no_vmport) { |