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author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-08-21 03:14:41 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-08-21 03:14:41 +0000 |
commit | b614106a170f77fc83ce9eb3ab0eb88379ee7161 (patch) | |
tree | 4fa1b04fa3c079ecb0009b8971c574632efd067d /hw/pc.c | |
parent | 43661a95207f5382efaba7c12ce9036b0c080864 (diff) | |
download | qemu-b614106a170f77fc83ce9eb3ab0eb88379ee7161.zip qemu-b614106a170f77fc83ce9eb3ab0eb88379ee7161.tar.gz qemu-b614106a170f77fc83ce9eb3ab0eb88379ee7161.tar.bz2 |
De-assert ISA PIC IRQs properly
[ Taking latest isapc changes into account. ]
In case the PIC IRQ gets de-asserted on an isapc machine, we also have
to reset CPU_INTERRUPT_HARD. This is what older qemu (before the
routing-through-APIC changes) used to do as well.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5040 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/pc.c')
-rw-r--r-- | hw/pc.c | 10 |
1 files changed, 6 insertions, 4 deletions
@@ -118,17 +118,19 @@ static void pic_irq_request(void *opaque, int irq, int level) { CPUState *env = first_cpu; - if (!level) - return; - if (env->apic_state) { + if (!level) + return; while (env) { if (apic_accept_pic_intr(env)) apic_local_deliver(env, APIC_LINT0); env = env->next_cpu; } } else { - cpu_interrupt(env, CPU_INTERRUPT_HARD); + if (level) + cpu_interrupt(env, CPU_INTERRUPT_HARD); + else + cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); } } |