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author | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-29 10:34:01 +0000 |
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committer | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-29 10:34:01 +0000 |
commit | 3efda49d150def64f69a79cbd8da760ea15a79b7 (patch) | |
tree | aafc57f460e5db9e5701cc9f89bec84545143b5f /hw/palm.c | |
parent | 8c9d7f83bf1f2d61f0fdd5fbc030ab67c8f433e7 (diff) | |
download | qemu-3efda49d150def64f69a79cbd8da760ea15a79b7.zip qemu-3efda49d150def64f69a79cbd8da760ea15a79b7.tar.gz qemu-3efda49d150def64f69a79cbd8da760ea15a79b7.tar.bz2 |
Add a TI TSC2102 chip (touchscreen/ADC/audio-CODEC controller).
Fix GPIO memory mapping address and register width.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3484 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/palm.c')
-rw-r--r-- | hw/palm.c | 13 |
1 files changed, 13 insertions, 0 deletions
@@ -76,8 +76,21 @@ static CPUWriteMemoryFunc *static_writefn[] = { #define PALMTE_MMC2_GPIO 7 #define PALMTE_MMC3_GPIO 11 +static void palmte_pintdav(void *opaque, int line, int level) +{ + struct omap_mpu_state_s *cpu = (struct omap_mpu_state_s *) opaque; + + qemu_set_irq(omap_gpio_in_get(cpu->gpio)[PALMTE_PINTDAV_GPIO], + !level); +} + static void palmte_microwire_setup(struct omap_mpu_state_s *cpu) { + omap_uwire_attach( + cpu->microwire, + tsc2102_init( + qemu_allocate_irqs(palmte_pintdav, cpu, 1)[0]), + 0); } static struct { |