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author | Peter Maydell <peter.maydell@linaro.org> | 2020-11-27 22:51:25 +0000 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2020-12-15 12:04:29 +0000 |
commit | 1eeffbeb1114441cb1822ce0af952a283e008f31 (patch) | |
tree | 6535f28e38a5cf59c1629197616da8917332c9f2 /hw/openrisc | |
parent | 3ddd9036389f5f577e09e1d2f54f8c384660b5ef (diff) | |
download | qemu-1eeffbeb1114441cb1822ce0af952a283e008f31.zip qemu-1eeffbeb1114441cb1822ce0af952a283e008f31.tar.gz qemu-1eeffbeb1114441cb1822ce0af952a283e008f31.tar.bz2 |
hw/openrisc/openrisc_sim: Use IRQ splitter when connecting IRQ to multiple CPUs
openrisc_sim_net_init() attempts to connect the IRQ line from the
ethernet device to both CPUs in an SMP configuration by simply caling
sysbus_connect_irq() for it twice. This doesn't work, because the
second connection simply overrides the first.
Fix this by creating a TYPE_SPLIT_IRQ to split the IRQ in the SMP
case.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Stafford Horne <shorne@gmail.com>
Message-id: 20201127225127.14770-2-peter.maydell@linaro.org
Diffstat (limited to 'hw/openrisc')
-rw-r--r-- | hw/openrisc/Kconfig | 1 | ||||
-rw-r--r-- | hw/openrisc/openrisc_sim.c | 13 |
2 files changed, 12 insertions, 2 deletions
diff --git a/hw/openrisc/Kconfig b/hw/openrisc/Kconfig index 6c1e868..8f284f3 100644 --- a/hw/openrisc/Kconfig +++ b/hw/openrisc/Kconfig @@ -3,3 +3,4 @@ config OR1K_SIM select SERIAL select OPENCORES_ETH select OMPIC + select SPLIT_IRQ diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c index d752282..a8adf6b 100644 --- a/hw/openrisc/openrisc_sim.c +++ b/hw/openrisc/openrisc_sim.c @@ -34,6 +34,7 @@ #include "hw/sysbus.h" #include "sysemu/qtest.h" #include "sysemu/reset.h" +#include "hw/core/split-irq.h" #define KERNEL_LOAD_ADDR 0x100 @@ -64,8 +65,16 @@ static void openrisc_sim_net_init(hwaddr base, hwaddr descriptors, s = SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(s, &error_fatal); - for (i = 0; i < num_cpus; i++) { - sysbus_connect_irq(s, 0, cpu_irqs[i][irq_pin]); + if (num_cpus > 1) { + DeviceState *splitter = qdev_new(TYPE_SPLIT_IRQ); + qdev_prop_set_uint32(splitter, "num-lines", num_cpus); + qdev_realize_and_unref(splitter, NULL, &error_fatal); + for (i = 0; i < num_cpus; i++) { + qdev_connect_gpio_out(splitter, i, cpu_irqs[i][irq_pin]); + } + sysbus_connect_irq(s, 0, qdev_get_gpio_in(splitter, 0)); + } else { + sysbus_connect_irq(s, 0, cpu_irqs[0][irq_pin]); } sysbus_mmio_map(s, 0, base); sysbus_mmio_map(s, 1, descriptors); |