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| author | Alexander Graf <agraf@suse.de> | 2011-07-23 11:05:35 +0200 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2011-10-06 09:43:33 +0200 |
| commit | 9250fd24a98af75f196480a75aacf99291ef46a9 (patch) | |
| tree | e6a0795ee4ab1d36e9f8401c118e7a6921b6553b /hw/openpic.c | |
| parent | a675155e2d78b083b47774c118990041333308b5 (diff) | |
| download | qemu-9250fd24a98af75f196480a75aacf99291ef46a9.zip qemu-9250fd24a98af75f196480a75aacf99291ef46a9.tar.gz qemu-9250fd24a98af75f196480a75aacf99291ef46a9.tar.bz2 | |
PPC: Set MPIC IDE for IPI to 0
We use the IDE register with IPIs as a mask to keep track which processors
have already acknowledged the respective interrupt. So we need to initialize
it to 0 to make sure that it doesn't accidently fire an IPI on CPU0 when the
first IPI is triggered.
Reported-by: Elie Richa <richa@adacore.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
---
v2 -> v3:
- fix IDE IPI reset
Diffstat (limited to 'hw/openpic.c')
| -rw-r--r-- | hw/openpic.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/hw/openpic.c b/hw/openpic.c index 9710ac0..31ad175 100644 --- a/hw/openpic.c +++ b/hw/openpic.c @@ -1299,6 +1299,10 @@ static void mpic_reset (void *opaque) mpp->src[i].ipvp = 0x80800000; mpp->src[i].ide = 0x00000001; } + /* Set IDE for IPIs to 0 so we don't get spurious interrupts */ + for (i = mpp->irq_ipi0; i < (mpp->irq_ipi0 + MAX_IPI); i++) { + mpp->src[i].ide = 0; + } /* Initialise IRQ destinations */ for (i = 0; i < MAX_CPU; i++) { mpp->dst[i].pctp = 0x0000000F; |