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author | Alexander Graf <agraf@suse.de> | 2013-01-07 20:15:28 +0100 |
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committer | Alexander Graf <agraf@suse.de> | 2013-01-18 19:06:56 +0100 |
commit | 1ac3d71302d9d49427dd068af7eccdd4de128522 (patch) | |
tree | 08ca6cc9d6cf907c91ba543aacc9163308b53821 /hw/openpic.c | |
parent | 7f11573b9fe6c03a9ad4cd1bbaa761e564d44fce (diff) | |
download | qemu-1ac3d71302d9d49427dd068af7eccdd4de128522.zip qemu-1ac3d71302d9d49427dd068af7eccdd4de128522.tar.gz qemu-1ac3d71302d9d49427dd068af7eccdd4de128522.tar.bz2 |
openpic: unify gcr mode mask updates
The mode mask already masks out bits we don't care about, so the
actual handling code can stay intact regardless.
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'hw/openpic.c')
-rw-r--r-- | hw/openpic.c | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/hw/openpic.c b/hw/openpic.c index 085c954..c986b5d 100644 --- a/hw/openpic.c +++ b/hw/openpic.c @@ -646,22 +646,23 @@ static inline void write_IRQreg_ivpr(OpenPICState *opp, int n_IRQ, uint32_t val) static void openpic_gcr_write(OpenPICState *opp, uint64_t val) { + CPUArchState *env; + int mpic_proxy = 0; + if (val & GCR_RESET) { openpic_reset(&opp->busdev.qdev); - } else if (opp->mpic_mode_mask) { - CPUArchState *env; - int mpic_proxy = 0; + return; + } - opp->gcr &= ~opp->mpic_mode_mask; - opp->gcr |= val & opp->mpic_mode_mask; + opp->gcr &= ~opp->mpic_mode_mask; + opp->gcr |= val & opp->mpic_mode_mask; - /* Set external proxy mode */ - if ((val & opp->mpic_mode_mask) == GCR_MODE_PROXY) { - mpic_proxy = 1; - } - for (env = first_cpu; env != NULL; env = env->next_cpu) { - env->mpic_proxy = mpic_proxy; - } + /* Set external proxy mode */ + if ((val & opp->mpic_mode_mask) == GCR_MODE_PROXY) { + mpic_proxy = 1; + } + for (env = first_cpu; env != NULL; env = env->next_cpu) { + env->mpic_proxy = mpic_proxy; } } |