Add endianness as io mem parameter

As stated before, devices can be little, big or native endian. The
target endianness is not of their concern, so we need to push things
down a level.

This patch adds a parameter to cpu_register_io_memory that allows a
device to choose its endianness. For now, all devices simply choose
native endian, because that's the same behavior as before.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>

1 files changed, 3 insertions, 2 deletions

diff --git a/hw/omap_l4.c b/hw/omap_l4.c
index bf8ba36..4af0ca8 100644
--- a/hw/omap_l4.c
+++ b/hw/omap_l4.c
@@ -107,7 +107,8 @@ int l4_register_io_memory(CPUReadMemoryFunc * const *mem_read,
                           CPUWriteMemoryFunc * const *mem_write,
                           void *opaque)
 {
-    return cpu_register_io_memory(mem_read, mem_write, opaque);
+    return cpu_register_io_memory(mem_read, mem_write, opaque,
+                                  DEVICE_NATIVE_ENDIAN);
 }
 #endif
 
@@ -131,7 +132,7 @@ struct omap_l4_s *omap_l4_init(target_phys_addr_t base, int ta_num)
 
     omap_cpu_io_entry =
             cpu_register_io_memory(omap_l4_io_readfn,
-                            omap_l4_io_writefn, bus);
+                            omap_l4_io_writefn, bus, DEVICE_NATIVE_ENDIAN);
 # define L4_PAGES	(0xb4000 / TARGET_PAGE_SIZE)
     omap_l4_io_readb_fn = qemu_mallocz(sizeof(void *) * L4_PAGES);
     omap_l4_io_readh_fn = qemu_mallocz(sizeof(void *) * L4_PAGES);