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| author | Peter Maydell <peter.maydell@linaro.org> | 2011-08-28 16:22:19 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2011-08-28 16:37:12 +0000 |
| commit | de8af7fe0158493baa1c9a5418ac598a18e86027 (patch) | |
| tree | 29a6958097977ce5c3bfb89ab31b39bd1858bbd9 /hw/omap_gpmc.c | |
| parent | 77c6c7369035c25d9d4babd920dbe691e3453cfc (diff) | |
| download | qemu-de8af7fe0158493baa1c9a5418ac598a18e86027.zip qemu-de8af7fe0158493baa1c9a5418ac598a18e86027.tar.gz qemu-de8af7fe0158493baa1c9a5418ac598a18e86027.tar.bz2 | |
omap_gpmc: Fix handling of FIFOTHRESHOLDSTATUS bit
The OMAP3 TRM is inconsistent about whether the GPMC FIFOTHRESHOLDSTATUS
bit should be set when FIFOPOINTER > FIFOTHRESHOLD or when it is >=
FIFOTHRESHOLD. Apparently the underlying functional spec from which
the TRM was created states that the behaviour is ">=", and this also
makes more conceptual sense.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/omap_gpmc.c')
| -rw-r--r-- | hw/omap_gpmc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/omap_gpmc.c b/hw/omap_gpmc.c index b728397..9da8491 100644 --- a/hw/omap_gpmc.c +++ b/hw/omap_gpmc.c @@ -222,7 +222,7 @@ static uint64_t omap_gpmc_read(void *opaque, target_phys_addr_t addr, return s->prefcontrol; case 0x1f0: /* GPMC_PREFETCH_STATUS */ return (s->preffifo << 24) | - ((s->preffifo > + ((s->preffifo >= ((s->prefconfig[0] >> 8) & 0x7f) ? 1 : 0) << 16) | s->prefcount; |