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author | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-04 15:26:28 +0000 |
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committer | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-04 15:26:28 +0000 |
commit | 54585ffec7b378b187679d9a374b70f9e6720dd5 (patch) | |
tree | b0a11a0ebf4a654e6ecd93ab269ca59522c64868 /hw/omap1.c | |
parent | 4c54e8756839e5ba2812ebe812d3542498a6a8a1 (diff) | |
download | qemu-54585ffec7b378b187679d9a374b70f9e6720dd5.zip qemu-54585ffec7b378b187679d9a374b70f9e6720dd5.tar.gz qemu-54585ffec7b378b187679d9a374b70f9e6720dd5.tar.bz2 |
OMAP STI/XTI console.
Add a dummy serial to receive the output from STI console (OMAP
debugging/emulation interface).
Add some more OMAP UART dummy registers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4331 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/omap1.c')
-rw-r--r-- | hw/omap1.c | 20 |
1 files changed, 20 insertions, 0 deletions
@@ -1987,6 +1987,8 @@ struct omap_uart_s { uint8_t syscontrol; uint8_t wkup; uint8_t cfps; + uint8_t mdr[2]; + uint8_t scr; }; void omap_uart_reset(struct omap_uart_s *s) @@ -2015,6 +2017,14 @@ static uint32_t omap_uart_read(void *opaque, target_phys_addr_t addr) int offset = addr - s->base; switch (offset) { + case 0x20: /* MDR1 */ + return s->mdr[0]; + case 0x24: /* MDR2 */ + return s->mdr[1]; + case 0x40: /* SCR */ + return s->scr; + case 0x44: /* SSR */ + return 0x0; case 0x48: /* EBLR */ return s->eblr; case 0x50: /* MVR */ @@ -2040,9 +2050,19 @@ static void omap_uart_write(void *opaque, target_phys_addr_t addr, int offset = addr - s->base; switch (offset) { + case 0x20: /* MDR1 */ + s->mdr[0] = value & 0x7f; + break; + case 0x24: /* MDR2 */ + s->mdr[1] = value & 0xff; + break; + case 0x40: /* SCR */ + s->scr = value & 0xff; + break; case 0x48: /* EBLR */ s->eblr = value & 0xff; break; + case 0x44: /* SSR */ case 0x50: /* MVR */ case 0x58: /* SYSS */ OMAP_RO_REG(addr); |