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author | Peter Maydell <peter.maydell@linaro.org> | 2011-09-23 09:44:38 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2011-09-23 09:44:38 +0000 |
commit | 0919ac787641db11024912651f3bc5764d4f1286 (patch) | |
tree | fa2c3c45aa6e2dab88e724c50a042482ffdba461 /hw/omap.h | |
parent | 53bb614ee344c2eb37cf5a79d56c945d7661fcf5 (diff) | |
download | qemu-0919ac787641db11024912651f3bc5764d4f1286.zip qemu-0919ac787641db11024912651f3bc5764d4f1286.tar.gz qemu-0919ac787641db11024912651f3bc5764d4f1286.tar.bz2 |
omap_intc: Qdevify
Convert the omap_intc devices to qdev. This includes adding
a 'revision' property which will be needed for omap3.
The bulk of this patch is the replacement of "s->irq[x][y]"
with "qdev_get_gpio_in(s->ih[x], y)" now that the interrupt
controller exposes its input lines as qdev gpio inputs.
The devices are named "omap-intc" and "omap2-intc", following
the filename and the OMAP2/3 hardware names, although some
internal functions are still named "omap_inth_*".
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/omap.h')
-rw-r--r-- | hw/omap.h | 21 |
1 files changed, 1 insertions, 20 deletions
@@ -99,18 +99,6 @@ target_phys_addr_t omap_l4_region_base(struct omap_target_agent_s *ta, int l4_register_io_memory(CPUReadMemoryFunc * const *mem_read, CPUWriteMemoryFunc * const *mem_write, void *opaque); -/* OMAP interrupt controller */ -struct omap_intr_handler_s; -struct omap_intr_handler_s *omap_inth_init(target_phys_addr_t base, - unsigned long size, unsigned char nbanks, qemu_irq **pins, - qemu_irq parent_irq, qemu_irq parent_fiq, omap_clk clk); -struct omap_intr_handler_s *omap2_inth_init(target_phys_addr_t base, - int size, int nbanks, qemu_irq **pins, - qemu_irq parent_irq, qemu_irq parent_fiq, - omap_clk fclk, omap_clk iclk); -void omap_inth_reset(struct omap_intr_handler_s *s); -qemu_irq omap_inth_get_pin(struct omap_intr_handler_s *s, int n); - /* OMAP2 SDRAM controller */ struct omap_sdrc_s; struct omap_sdrc_s *omap_sdrc_init(target_phys_addr_t base); @@ -692,9 +680,6 @@ struct uWireSlave { void *opaque; }; struct omap_uwire_s; -struct omap_uwire_s *omap_uwire_init(MemoryRegion *system_memory, - target_phys_addr_t base, - qemu_irq *irq, qemu_irq dma, omap_clk clk); void omap_uwire_attach(struct omap_uwire_s *s, uWireSlave *slave, int chipselect); @@ -732,9 +717,6 @@ struct I2SCodec { } in, out; }; struct omap_mcbsp_s; -struct omap_mcbsp_s *omap_mcbsp_init(MemoryRegion *system_memory, - target_phys_addr_t base, - qemu_irq *irq, qemu_irq *dma, omap_clk clk); void omap_mcbsp_i2s_attach(struct omap_mcbsp_s *s, I2SCodec *slave); void omap_tap_init(struct omap_target_agent_s *ta, @@ -823,7 +805,6 @@ struct omap_mpu_state_s { CPUState *env; - qemu_irq *irq[2]; qemu_irq *drq; qemu_irq wakeup; @@ -896,7 +877,7 @@ struct omap_mpu_state_s { struct omap_lpg_s *led[2]; /* MPU private TIPB peripherals */ - struct omap_intr_handler_s *ih[2]; + DeviceState *ih[2]; struct soc_dma_s *dma; |