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authorbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-12-09 22:32:42 +0000
committerbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-12-09 22:32:42 +0000
commit089b7c0a4c2a0b0953ed4323f893eb5af2ca4e2c (patch)
tree5a90ae4bc3e433b940fa56985602d1d70cac99a4 /hw/omap.h
parent7eb0c8e8f973ba842bf5f915f4559e88ba2ffcae (diff)
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OMAP DMA 3.2 support by Lauro Ramos Venancio.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3786 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/omap.h')
-rw-r--r--hw/omap.h50
1 files changed, 46 insertions, 4 deletions
diff --git a/hw/omap.h b/hw/omap.h
index cd4e53b..18145ed 100644
--- a/hw/omap.h
+++ b/hw/omap.h
@@ -336,26 +336,68 @@ struct omap_intr_handler_s *omap_inth_init(target_phys_addr_t base,
# define OMAP_INT_243X_HS_USB_DMA 93
# define OMAP_INT_243X_CARKIT 94
+enum omap_dma_model {
+ omap_dma_3_1 = 0,
+ omap_dma_3_2
+};
+
struct omap_dma_s;
-struct omap_dma_s *omap_dma_init(target_phys_addr_t base,
- qemu_irq pic[], struct omap_mpu_state_s *mpu, omap_clk clk);
+struct omap_dma_s *omap_dma_init(target_phys_addr_t base, qemu_irq *irqs,
+ qemu_irq lcd_irq, struct omap_mpu_state_s *mpu, omap_clk clk,
+ enum omap_dma_model model);
enum omap_dma_port {
emiff = 0,
emifs,
- imif,
+ imif, /* omap16xx: ocp_t1 */
tipb,
- local,
+ local, /* omap16xx: ocp_t2 */
tipb_mpui,
omap_dma_port_last,
};
+typedef enum {
+ constant = 0,
+ post_incremented,
+ single_index,
+ double_index,
+} omap_dma_addressing_t;
+
struct omap_dma_lcd_channel_s {
enum omap_dma_port src;
target_phys_addr_t src_f1_top;
target_phys_addr_t src_f1_bottom;
target_phys_addr_t src_f2_top;
target_phys_addr_t src_f2_bottom;
+
+ /* Used in OMAP DMA 3.2 gigacell */
+ unsigned char brust_f1;
+ unsigned char pack_f1;
+ unsigned char data_type_f1;
+ unsigned char brust_f2;
+ unsigned char pack_f2;
+ unsigned char data_type_f2;
+ unsigned char end_prog;
+ unsigned char repeat;
+ unsigned char auto_init;
+ unsigned char priority;
+ unsigned char fs;
+ unsigned char running;
+ unsigned char bs;
+ unsigned char omap_3_1_compatible_disable;
+ unsigned char dst;
+ unsigned char lch_type;
+ int16_t element_index_f1;
+ int16_t element_index_f2;
+ int32_t frame_index_f1;
+ int32_t frame_index_f2;
+ uint16_t elements_f1;
+ uint16_t frames_f1;
+ uint16_t elements_f2;
+ uint16_t frames_f2;
+ omap_dma_addressing_t mode_f1;
+ omap_dma_addressing_t mode_f2;
+
/* Destination port is fixed. */
int interrupts;
int condition;