aboutsummaryrefslogtreecommitdiff
path: root/hw/nvme
diff options
context:
space:
mode:
authorKlaus Jensen <k.jensen@samsung.com>2022-12-08 09:12:45 +0100
committerKlaus Jensen <k.jensen@samsung.com>2023-01-09 08:48:46 +0100
commitfa5db2aa168bdc0f15c269b6212ef47632fab8ba (patch)
tree59dd93900b5cf84801640abcc4bce4478db19a15 /hw/nvme
parent2fda0726e5149e032acfa5fe442db56cd6433c4c (diff)
downloadqemu-fa5db2aa168bdc0f15c269b6212ef47632fab8ba.zip
qemu-fa5db2aa168bdc0f15c269b6212ef47632fab8ba.tar.gz
qemu-fa5db2aa168bdc0f15c269b6212ef47632fab8ba.tar.bz2
hw/nvme: fix missing cq eventidx update
Prior to reading the shadow doorbell cq head, we have to update the eventidx. Otherwise, we risk that the driver will skip an mmio doorbell write. This happens on riscv64, as reported by Guenter. Adding the missing update to the cq eventidx fixes the issue. Fixes: 3f7fe8de3d49 ("hw/nvme: Implement shadow doorbell buffer support") Cc: qemu-stable@nongnu.org Cc: qemu-riscv@nongnu.org Reported-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Keith Busch <kbusch@kernel.org> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Diffstat (limited to 'hw/nvme')
-rw-r--r--hw/nvme/ctrl.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index 28e02ec..2264800 100644
--- a/hw/nvme/ctrl.c
+++ b/hw/nvme/ctrl.c
@@ -1334,6 +1334,15 @@ static inline void nvme_blk_write(BlockBackend *blk, int64_t offset,
}
}
+static void nvme_update_cq_eventidx(const NvmeCQueue *cq)
+{
+ uint32_t v = cpu_to_le32(cq->head);
+
+ trace_pci_nvme_update_cq_eventidx(cq->cqid, cq->head);
+
+ pci_dma_write(PCI_DEVICE(cq->ctrl), cq->ei_addr, &v, sizeof(v));
+}
+
static void nvme_update_cq_head(NvmeCQueue *cq)
{
uint32_t v;
@@ -1358,6 +1367,7 @@ static void nvme_post_cqes(void *opaque)
hwaddr addr;
if (n->dbbuf_enabled) {
+ nvme_update_cq_eventidx(cq);
nvme_update_cq_head(cq);
}