aboutsummaryrefslogtreecommitdiff
path: root/hw/nvme/Kconfig
diff options
context:
space:
mode:
authorRichard Henderson <richard.henderson@linaro.org>2023-07-17 15:48:27 +0100
committerRichard Henderson <richard.henderson@linaro.org>2023-07-17 15:48:48 +0100
commit08572022e5b743f7f52ed99cd1f4e50f77ff0038 (patch)
tree5b102fdc0e98041fb4bc61a7b3d1c3e2513b6fca /hw/nvme/Kconfig
parentf44ccac2c0c4c8dc8007b8647e50dcfb16fe7cce (diff)
parentc2c1c4a35c7c2b1a4140b0942b9797c857e476a4 (diff)
downloadqemu-08572022e5b743f7f52ed99cd1f4e50f77ff0038.zip
qemu-08572022e5b743f7f52ed99cd1f4e50f77ff0038.tar.gz
qemu-08572022e5b743f7f52ed99cd1f4e50f77ff0038.tar.bz2
Merge tag 'pull-target-arm-20230717' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * hw/arm/sbsa-ref: set 'slots' property of xhci * linux-user: Remove pointless NULL check in clock_adjtime handling * ptw: Fix S1_ptw_translate() debug path * ptw: Account for FEAT_RME when applying {N}SW, SA bits * accel/tcg: Zero-pad PC in TCG CPU exec trace lines * hw/nvram: Avoid unnecessary Xilinx eFuse backstore write # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmS1OEUZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3syoEACBj2B+btKASbWs6c7iUF9R # bsMhVVZbeNrW7try7fIjAcvRQV2X7cdqHMGeX0yP9M5EcqBfz4ptxDbxcmEsgm0h # kZJudG8RuZ/gnw7wbwQ1TfJf4KgsBh49yZjlom2s8CgVStpbuFO4xz7ZucR65uhl # PwLCgW0/DJR4SQTvDLnCOTTNbY/cuWCKK1CmuLMOE9IgozMNOxxW5wkryrvdllKs # hYSCWM1jy9fJ4TRlhDJy8JI7+t4TEZN9ESwYGE6QDly8r3GoGMFj5Z9okUbGp3/V # MYfkbz7l2/C5QxcpY5d0mJUR1HlP7McO7rWhtQjqmCPGpDVqMUu4/DClu6Q/2Ob3 # GRQcgztZ8a9wgVa6b4g1UBkqCnloT7WtU3wLVVmZGF3DO4k+oz53XPHb2zFtI3Xx # pQ9LyABIoKCM5ql+/WaA3thtTC1qH6lZnjMBqVBx8+d0zKYWSG4wlnbihy70GOpw # V5n0fQlTXr5WV4tZT/euP17odvnkictH7Vmj6zHUFkHdqHxwFwG0OCw1ZjBrMbzl # 7kY9DxGA+5iKEZoTwHpxXYny70MnpdRIrUhpZ/4PNq68hzIAQ5Dqm29DtKjodM60 # M49CIo+O9E3+0xpcGPDtcuJ7bVPd/95o3usVjapDdBREGWcJsPS6PHK3MuAxgkHo # B0y1egitacJYp3x91gYIRA== # =JPpH # -----END PGP SIGNATURE----- # gpg: Signature made Mon 17 Jul 2023 01:47:01 PM BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] * tag 'pull-target-arm-20230717' of https://git.linaro.org/people/pmaydell/qemu-arm: hw/nvram: Avoid unnecessary Xilinx eFuse backstore write accel/tcg: Zero-pad PC in TCG CPU exec trace lines target/arm/ptw.c: Account for FEAT_RME when applying {N}SW, SA bits target/arm: Fix S1_ptw_translate() debug path target/arm/ptw.c: Add comments to S1Translate struct fields linux-user: Remove pointless NULL check in clock_adjtime handling hw/arm/sbsa-ref: set 'slots' property of xhci Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/nvme/Kconfig')
0 files changed, 0 insertions, 0 deletions