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authorRichard Henderson <richard.henderson@linaro.org>2022-04-21 08:17:32 -0700
committerRichard Henderson <richard.henderson@linaro.org>2022-04-26 08:17:05 -0700
commite734cedf119700813478cc84511d9d7cc966c1d6 (patch)
tree8c32c25081bf2fd837ddd46fc9fa050ee27f9577 /hw/nios2
parent6fc834d5fe3f9fd4f66fa7c9fc5b5b066488c439 (diff)
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hw/nios2: Move memory regions into Nios2Machine
Convert to contiguous allocation, as much as possible so far. The two timer objects are not exposed for subobject allocation. Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-62-richard.henderson@linaro.org>
Diffstat (limited to 'hw/nios2')
-rw-r--r--hw/nios2/10m50_devboard.c30
1 files changed, 16 insertions, 14 deletions
diff --git a/hw/nios2/10m50_devboard.c b/hw/nios2/10m50_devboard.c
index bdc3ffd..dda4ab2 100644
--- a/hw/nios2/10m50_devboard.c
+++ b/hw/nios2/10m50_devboard.c
@@ -38,6 +38,11 @@
struct Nios2MachineState {
MachineState parent_obj;
+
+ MemoryRegion phys_tcm;
+ MemoryRegion phys_tcm_alias;
+ MemoryRegion phys_ram;
+ MemoryRegion phys_ram_alias;
};
#define TYPE_NIOS2_MACHINE MACHINE_TYPE_NAME("10m50-ghrd")
@@ -47,13 +52,10 @@ OBJECT_DECLARE_TYPE(Nios2MachineState, MachineClass, NIOS2_MACHINE)
static void nios2_10m50_ghrd_init(MachineState *machine)
{
+ Nios2MachineState *nms = NIOS2_MACHINE(machine);
Nios2CPU *cpu;
DeviceState *dev;
MemoryRegion *address_space_mem = get_system_memory();
- MemoryRegion *phys_tcm = g_new(MemoryRegion, 1);
- MemoryRegion *phys_tcm_alias = g_new(MemoryRegion, 1);
- MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
- MemoryRegion *phys_ram_alias = g_new(MemoryRegion, 1);
ram_addr_t tcm_base = 0x0;
ram_addr_t tcm_size = 0x1000; /* 1 kiB, but QEMU limit is 4 kiB */
ram_addr_t ram_base = 0x08000000;
@@ -62,22 +64,22 @@ static void nios2_10m50_ghrd_init(MachineState *machine)
int i;
/* Physical TCM (tb_ram_1k) with alias at 0xc0000000 */
- memory_region_init_ram(phys_tcm, NULL, "nios2.tcm", tcm_size,
+ memory_region_init_ram(&nms->phys_tcm, NULL, "nios2.tcm", tcm_size,
&error_abort);
- memory_region_init_alias(phys_tcm_alias, NULL, "nios2.tcm.alias",
- phys_tcm, 0, tcm_size);
- memory_region_add_subregion(address_space_mem, tcm_base, phys_tcm);
+ memory_region_init_alias(&nms->phys_tcm_alias, NULL, "nios2.tcm.alias",
+ &nms->phys_tcm, 0, tcm_size);
+ memory_region_add_subregion(address_space_mem, tcm_base, &nms->phys_tcm);
memory_region_add_subregion(address_space_mem, 0xc0000000 + tcm_base,
- phys_tcm_alias);
+ &nms->phys_tcm_alias);
/* Physical DRAM with alias at 0xc0000000 */
- memory_region_init_ram(phys_ram, NULL, "nios2.ram", ram_size,
+ memory_region_init_ram(&nms->phys_ram, NULL, "nios2.ram", ram_size,
&error_abort);
- memory_region_init_alias(phys_ram_alias, NULL, "nios2.ram.alias",
- phys_ram, 0, ram_size);
- memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
+ memory_region_init_alias(&nms->phys_ram_alias, NULL, "nios2.ram.alias",
+ &nms->phys_ram, 0, ram_size);
+ memory_region_add_subregion(address_space_mem, ram_base, &nms->phys_ram);
memory_region_add_subregion(address_space_mem, 0xc0000000 + ram_base,
- phys_ram_alias);
+ &nms->phys_ram_alias);
/* Create CPU -- FIXME */
cpu = NIOS2_CPU(cpu_create(TYPE_NIOS2_CPU));