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authorAkihiko Odaki <akihiko.odaki@daynix.com>2023-05-23 11:43:25 +0900
committerJason Wang <jasowang@redhat.com>2023-05-23 15:20:15 +0800
commit191e8bde88a47303eed697a1fb56d19eb0a2a759 (patch)
tree2646674d6501186c6f5813ccb4dbba8bfe939aeb /hw/net
parentc6e33a2c529088ef2be787d0704d5706bb154450 (diff)
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igb: Implement MSI-X single vector mode
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Sriram Yagnaraman <sriram.yagnaraman@est.tech> Signed-off-by: Jason Wang <jasowang@redhat.com>
Diffstat (limited to 'hw/net')
-rw-r--r--hw/net/igb_core.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c
index c954369..6d55b43 100644
--- a/hw/net/igb_core.c
+++ b/hw/net/igb_core.c
@@ -1873,7 +1873,7 @@ igb_update_interrupt_state(IGBCore *core)
icr = core->mac[ICR] & core->mac[IMS];
- if (msix_enabled(core->owner)) {
+ if (core->mac[GPIE] & E1000_GPIE_MSIX_MODE) {
if (icr) {
causes = 0;
if (icr & E1000_ICR_DRSTA) {
@@ -1908,7 +1908,12 @@ igb_update_interrupt_state(IGBCore *core)
trace_e1000e_irq_pending_interrupts(core->mac[ICR] & core->mac[IMS],
core->mac[ICR], core->mac[IMS]);
- if (msi_enabled(core->owner)) {
+ if (msix_enabled(core->owner)) {
+ if (icr) {
+ trace_e1000e_irq_msix_notify_vec(0);
+ msix_notify(core->owner, 0);
+ }
+ } else if (msi_enabled(core->owner)) {
if (icr) {
msi_notify(core->owner, 0);
}