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authorFabien Chouteau <chouteau@adacore.com>2014-04-02 16:49:32 +0200
committerAlexander Graf <agraf@suse.de>2014-06-16 13:24:26 +0200
commitd5843485894e30133ee0f70deda0f1118e539be4 (patch)
tree339c7c087ab62ab104df15fc1bc439a3a4014293 /hw/net/fsl_etsec
parent1c38f84373dd0a360883a343f6f50a5c0c856dec (diff)
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Fix typo in eTSEC Ethernet controller
IRQ are lowered when ievent bit is cleared, so irq_pulse makes no sense here... Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'hw/net/fsl_etsec')
-rw-r--r--hw/net/fsl_etsec/rings.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/net/fsl_etsec/rings.c b/hw/net/fsl_etsec/rings.c
index e36cfbe..d4a494f 100644
--- a/hw/net/fsl_etsec/rings.c
+++ b/hw/net/fsl_etsec/rings.c
@@ -159,7 +159,7 @@ static void ievent_set(eTSEC *etsec,
if ((flags & IEVENT_RXB && etsec->regs[IMASK].value & IMASK_RXBEN)
|| (flags & IEVENT_RXF && etsec->regs[IMASK].value & IMASK_RXFEN)) {
- qemu_irq_pulse(etsec->rx_irq);
+ qemu_irq_raise(etsec->rx_irq);
RING_DEBUG("%s Raise Rx IRQ\n", __func__);
}
}