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author | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-24 18:50:09 +0000 |
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committer | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-05-24 18:50:09 +0000 |
commit | aa941b944500bf77f0bdbfa0a7112b4e89670ff1 (patch) | |
tree | 59f1c3e46b42022a3966e108752ca92531169380 /hw/nand.c | |
parent | 3f6c925f37cd8a1dddb8a8fbbcef4630ea347775 (diff) | |
download | qemu-aa941b944500bf77f0bdbfa0a7112b4e89670ff1.zip qemu-aa941b944500bf77f0bdbfa0a7112b4e89670ff1.tar.gz qemu-aa941b944500bf77f0bdbfa0a7112b4e89670ff1.tar.bz2 |
Savevm/loadvm bits for ARM core, the PXA2xx peripherals and Spitz hardware.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2857 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/nand.c')
-rw-r--r-- | hw/nand.c | 47 |
1 files changed, 47 insertions, 0 deletions
@@ -273,6 +273,50 @@ static void nand_command(struct nand_flash_s *s) } } +static void nand_save(QEMUFile *f, void *opaque) +{ + struct nand_flash_s *s = (struct nand_flash_s *) opaque; + qemu_put_byte(f, s->cle); + qemu_put_byte(f, s->ale); + qemu_put_byte(f, s->ce); + qemu_put_byte(f, s->wp); + qemu_put_byte(f, s->gnd); + qemu_put_buffer(f, s->io, sizeof(s->io)); + qemu_put_be32(f, s->ioaddr - s->io); + qemu_put_be32(f, s->iolen); + + qemu_put_be32s(f, &s->cmd); + qemu_put_be32s(f, &s->addr); + qemu_put_be32(f, s->addrlen); + qemu_put_be32(f, s->status); + qemu_put_be32(f, s->offset); + /* XXX: do we want to save s->storage too? */ +} + +static int nand_load(QEMUFile *f, void *opaque, int version_id) +{ + struct nand_flash_s *s = (struct nand_flash_s *) opaque; + s->cle = qemu_get_byte(f); + s->ale = qemu_get_byte(f); + s->ce = qemu_get_byte(f); + s->wp = qemu_get_byte(f); + s->gnd = qemu_get_byte(f); + qemu_get_buffer(f, s->io, sizeof(s->io)); + s->ioaddr = s->io + qemu_get_be32(f); + s->iolen = qemu_get_be32(f); + if (s->ioaddr >= s->io + sizeof(s->io) || s->ioaddr < s->io) + return -EINVAL; + + qemu_get_be32s(f, &s->cmd); + qemu_get_be32s(f, &s->addr); + s->addrlen = qemu_get_be32(f); + s->status = qemu_get_be32(f); + s->offset = qemu_get_be32(f); + return 0; +} + +static int nand_iid = 0; + /* * Chip inputs are CLE, ALE, CE, WP, GND and eight I/O pins. Chip * outputs are R/B and eight I/O pins. @@ -443,6 +487,9 @@ struct nand_flash_s *nand_init(int manf_id, int chip_id) if (pagesize) s->storage = (uint8_t *) memset(qemu_malloc(s->pages * pagesize), 0xff, s->pages * pagesize); + + register_savevm("nand", nand_iid ++, 0, nand_save, nand_load, s); + return s; } |