diff options
| author | malc <av1474@comtv.ru> | 2009-10-01 22:20:47 +0400 |
|---|---|---|
| committer | malc <av1474@comtv.ru> | 2009-10-01 22:45:02 +0400 |
| commit | 99a0949b720a0936da2052cb9a46db04ffc6db29 (patch) | |
| tree | f9e39633853e35b49fc4465337cc196b9650866e /hw/msix.c | |
| parent | bc6291a1b95a2c4c546fde6e5cb4c68366f06649 (diff) | |
| download | qemu-99a0949b720a0936da2052cb9a46db04ffc6db29.zip qemu-99a0949b720a0936da2052cb9a46db04ffc6db29.tar.gz qemu-99a0949b720a0936da2052cb9a46db04ffc6db29.tar.bz2 | |
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the time
being.
Signed-off-by: malc <av1474@comtv.ru>
Diffstat (limited to 'hw/msix.c')
| -rw-r--r-- | hw/msix.c | 10 |
1 files changed, 5 insertions, 5 deletions
@@ -123,7 +123,7 @@ void msix_write_config(PCIDevice *dev, uint32_t addr, qemu_set_irq(dev->irq[0], 0); } -static uint32_t msix_mmio_readl(void *opaque, target_phys_addr_t addr) +static uint32_t msix_mmio_readl(void *opaque, a_target_phys_addr addr) { PCIDevice *dev = opaque; unsigned int offset = addr & (dev->msix_page_size - 1); @@ -135,7 +135,7 @@ static uint32_t msix_mmio_readl(void *opaque, target_phys_addr_t addr) return val; } -static uint32_t msix_mmio_read_unallowed(void *opaque, target_phys_addr_t addr) +static uint32_t msix_mmio_read_unallowed(void *opaque, a_target_phys_addr addr) { fprintf(stderr, "MSI-X: only dword read is allowed!\n"); return 0; @@ -172,7 +172,7 @@ static int msix_is_masked(PCIDevice *dev, int vector) return dev->msix_table_page[offset] & MSIX_VECTOR_MASK; } -static void msix_mmio_writel(void *opaque, target_phys_addr_t addr, +static void msix_mmio_writel(void *opaque, a_target_phys_addr addr, uint32_t val) { PCIDevice *dev = opaque; @@ -185,7 +185,7 @@ static void msix_mmio_writel(void *opaque, target_phys_addr_t addr, } } -static void msix_mmio_write_unallowed(void *opaque, target_phys_addr_t addr, +static void msix_mmio_write_unallowed(void *opaque, a_target_phys_addr addr, uint32_t val) { fprintf(stderr, "MSI-X: only dword write is allowed!\n"); @@ -221,7 +221,7 @@ void msix_mmio_map(PCIDevice *d, int region_num, /* Initialize the MSI-X structures. Note: if MSI-X is supported, BAR size is * modified, it should be retrieved with msix_bar_size. */ int msix_init(struct PCIDevice *dev, unsigned short nentries, - unsigned bar_nr, unsigned bar_size, target_phys_addr_t page_size) + unsigned bar_nr, unsigned bar_size, a_target_phys_addr page_size) { int ret; /* Nothing to do if MSI is not supported by interrupt controller */ |