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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2022-03-23 12:47:18 +0100 |
|---|---|---|
| committer | Stefan Hajnoczi <stefanha@redhat.com> | 2022-03-24 10:38:42 +0000 |
| commit | 2539eade4f689eda7e9fe45486f18334bfbafaf0 (patch) | |
| tree | eba9f7946a14f2fe6a97b337b923dc44e8783953 /hw/misc | |
| parent | 3f1db95917bf0b4accaf8f56d43f795fed1fb733 (diff) | |
| download | qemu-2539eade4f689eda7e9fe45486f18334bfbafaf0.zip qemu-2539eade4f689eda7e9fe45486f18334bfbafaf0.tar.gz qemu-2539eade4f689eda7e9fe45486f18334bfbafaf0.tar.bz2 | |
hw: Fix misleading hexadecimal format
"0x%u" format is very misleading, replace by "0x%x".
Found running:
$ git grep -E '0x%[0-9]*([lL]*|" ?PRI)[dDuU]' hw/
Inspired-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-id: 20220323114718.58714-3-philippe.mathieu.daude@gmail.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'hw/misc')
| -rw-r--r-- | hw/misc/trace-events | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/misc/trace-events b/hw/misc/trace-events index bd52cfc..4e0c797 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -1,7 +1,7 @@ # See docs/devel/tracing.rst for syntax documentation. # allwinner-cpucfg.c -allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_addr 0x%" PRIu32 +allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_addr 0x%" PRIx32 allwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 allwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 @@ -93,7 +93,7 @@ imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08 # mos6522.c mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d" -mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64 +mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRIx64 " delta_next=0x%"PRIx64 mos6522_set_sr_int(void) "set sr_int" mos6522_write(uint64_t addr, const char *name, uint64_t val) "reg=0x%"PRIx64 " [%s] val=0x%"PRIx64 mos6522_read(uint64_t addr, const char *name, unsigned val) "reg=0x%"PRIx64 " [%s] val=0x%x" |