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authorAndreas Färber <afaerber@suse.de>2013-07-26 22:32:18 +0200
committerAndreas Färber <afaerber@suse.de>2013-07-29 21:06:59 +0200
commit5c0e12f5a6f6da6cc63e4d0fd309f4699300daa0 (patch)
tree72e50bd2e22d609836aeb6757246bbba60e88b9a /hw/misc/mst_fpga.c
parentaee31f7b4b7e23cfcdab604b6edc5e7df8d5c32f (diff)
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mst_fpga: QOM cast cleanup
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/misc/mst_fpga.c')
-rw-r--r--hw/misc/mst_fpga.c68
1 files changed, 36 insertions, 32 deletions
diff --git a/hw/misc/mst_fpga.c b/hw/misc/mst_fpga.c
index 604be5e..c96810f 100644
--- a/hw/misc/mst_fpga.c
+++ b/hw/misc/mst_fpga.c
@@ -35,25 +35,30 @@
#define MST_PCMCIA_CD0_IRQ 9
#define MST_PCMCIA_CD1_IRQ 13
+#define TYPE_MAINSTONE_FPGA "mainstone-fpga"
+#define MAINSTONE_FPGA(obj) \
+ OBJECT_CHECK(mst_irq_state, (obj), TYPE_MAINSTONE_FPGA)
+
typedef struct mst_irq_state{
- SysBusDevice busdev;
- MemoryRegion iomem;
-
- qemu_irq parent;
-
- uint32_t prev_level;
- uint32_t leddat1;
- uint32_t leddat2;
- uint32_t ledctrl;
- uint32_t gpswr;
- uint32_t mscwr1;
- uint32_t mscwr2;
- uint32_t mscwr3;
- uint32_t mscrd;
- uint32_t intmskena;
- uint32_t intsetclr;
- uint32_t pcmcia0;
- uint32_t pcmcia1;
+ SysBusDevice parent_obj;
+
+ MemoryRegion iomem;
+
+ qemu_irq parent;
+
+ uint32_t prev_level;
+ uint32_t leddat1;
+ uint32_t leddat2;
+ uint32_t ledctrl;
+ uint32_t gpswr;
+ uint32_t mscwr1;
+ uint32_t mscwr2;
+ uint32_t mscwr3;
+ uint32_t mscrd;
+ uint32_t intmskena;
+ uint32_t intsetclr;
+ uint32_t pcmcia0;
+ uint32_t pcmcia1;
}mst_irq_state;
static void
@@ -194,24 +199,23 @@ static int mst_fpga_post_load(void *opaque, int version_id)
return 0;
}
-static int mst_fpga_init(SysBusDevice *dev)
+static int mst_fpga_init(SysBusDevice *sbd)
{
- mst_irq_state *s;
-
- s = FROM_SYSBUS(mst_irq_state, dev);
+ DeviceState *dev = DEVICE(sbd);
+ mst_irq_state *s = MAINSTONE_FPGA(dev);
- s->pcmcia0 = MST_PCMCIAx_READY | MST_PCMCIAx_nCD;
- s->pcmcia1 = MST_PCMCIAx_READY | MST_PCMCIAx_nCD;
+ s->pcmcia0 = MST_PCMCIAx_READY | MST_PCMCIAx_nCD;
+ s->pcmcia1 = MST_PCMCIAx_READY | MST_PCMCIAx_nCD;
- sysbus_init_irq(dev, &s->parent);
+ sysbus_init_irq(sbd, &s->parent);
- /* alloc the external 16 irqs */
- qdev_init_gpio_in(&dev->qdev, mst_fpga_set_irq, MST_NUM_IRQS);
+ /* alloc the external 16 irqs */
+ qdev_init_gpio_in(dev, mst_fpga_set_irq, MST_NUM_IRQS);
- memory_region_init_io(&s->iomem, OBJECT(s), &mst_fpga_ops, s,
- "fpga", 0x00100000);
- sysbus_init_mmio(dev, &s->iomem);
- return 0;
+ memory_region_init_io(&s->iomem, OBJECT(s), &mst_fpga_ops, s,
+ "fpga", 0x00100000);
+ sysbus_init_mmio(sbd, &s->iomem);
+ return 0;
}
static VMStateDescription vmstate_mst_fpga_regs = {
@@ -249,7 +253,7 @@ static void mst_fpga_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo mst_fpga_info = {
- .name = "mainstone-fpga",
+ .name = TYPE_MAINSTONE_FPGA,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(mst_irq_state),
.class_init = mst_fpga_class_init,