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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2017-07-29 20:49:30 -0300
committerPeter Maydell <peter.maydell@linaro.org>2017-07-31 13:11:56 +0100
commit89cbc3778a3d61761e2231e740269218c9a8a41d (patch)
treee3e7d81d7e1873a859b4583e22ade27c57df44c4 /hw/misc/mps2-scc.c
parentf1a4694078f1b43cb2f72a1ec81b1c635d8793d1 (diff)
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hw/mps2_scc: fix incorrect properties
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170729234930.725-1-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/misc/mps2-scc.c')
-rw-r--r--hw/misc/mps2-scc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/misc/mps2-scc.c b/hw/misc/mps2-scc.c
index cc58d26..32be2a9 100644
--- a/hw/misc/mps2-scc.c
+++ b/hw/misc/mps2-scc.c
@@ -270,9 +270,9 @@ static Property mps2_scc_properties[] = {
/* Values for various read-only ID registers (which are specific
* to the board model or FPGA image)
*/
- DEFINE_PROP_UINT32("scc-cfg4", MPS2SCC, aid, 0),
+ DEFINE_PROP_UINT32("scc-cfg4", MPS2SCC, cfg4, 0),
DEFINE_PROP_UINT32("scc-aid", MPS2SCC, aid, 0),
- DEFINE_PROP_UINT32("scc-id", MPS2SCC, aid, 0),
+ DEFINE_PROP_UINT32("scc-id", MPS2SCC, id, 0),
/* These are the initial settings for the source clocks on the board.
* In hardware they can be configured via a config file read by the
* motherboard configuration controller to suit the FPGA image.