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authorBernhard Beschow <shentey@gmail.com>2022-06-13 19:24:55 +0200
committerPhilippe Mathieu-Daudé <philmd@linaro.org>2022-10-31 11:32:07 +0100
commit9eb6abbf6aea3116b3a4a7a6fbbb89ec836c0551 (patch)
tree7325a82d31cfb1135f5b6b0b58ce3083948ce0b4 /hw/mips
parent4b8fd0661a6c57f6a94b55e462626d522fa9c5cc (diff)
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hw/isa/vt82c686: Instantiate IDE function in host device
The IDE function is closely tied to the ISA function (e.g. the IDE interrupt routing happens there), so it makes sense that the IDE function is instantiated within the south bridge itself. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220901114127.53914-7-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'hw/mips')
-rw-r--r--hw/mips/fuloong2e.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index 44225fb..3260590 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -199,13 +199,13 @@ static void main_cpu_reset(void *opaque)
static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc,
I2CBus **i2c_bus)
{
- PCIDevice *dev;
+ PCIDevice *dev, *via;
- dev = pci_create_simple_multifunction(pci_bus, PCI_DEVFN(slot, 0), true,
+ via = pci_create_simple_multifunction(pci_bus, PCI_DEVFN(slot, 0), true,
TYPE_VT82C686B_ISA);
- qdev_connect_gpio_out(DEVICE(dev), 0, intc);
+ qdev_connect_gpio_out(DEVICE(via), 0, intc);
- dev = pci_create_simple(pci_bus, PCI_DEVFN(slot, 1), TYPE_VIA_IDE);
+ dev = PCI_DEVICE(object_resolve_path_component(OBJECT(via), "ide"));
pci_ide_create_devs(dev);
pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci");