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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-12-02 18:53:09 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-12-13 20:26:02 +0100 |
| commit | 8de0f2804676decfa82ce51ef18293523e67af32 (patch) | |
| tree | c3313f4b06d698e1b7aba6dd1780585318166b8b /hw/mips/malta.c | |
| parent | ecc268e7c2488c0285684fad6d04cac6a794991d (diff) | |
| download | qemu-8de0f2804676decfa82ce51ef18293523e67af32.zip qemu-8de0f2804676decfa82ce51ef18293523e67af32.tar.gz qemu-8de0f2804676decfa82ce51ef18293523e67af32.tar.bz2 | |
hw/mips/malta: Do not initialize MT registers if MT ASE absent
Do not initialize MT-related config register if the MT ASE
is not present.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201204222622.2743175-5-f4bug@amsat.org>
Diffstat (limited to 'hw/mips/malta.c')
| -rw-r--r-- | hw/mips/malta.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 4651a10..f06cb90 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1135,8 +1135,10 @@ static void malta_mips_config(MIPSCPU *cpu) CPUMIPSState *env = &cpu->env; CPUState *cs = CPU(cpu); - env->mvp->CP0_MVPConf0 |= ((smp_cpus - 1) << CP0MVPC0_PVPE) | + if (ase_mt_available(env)) { + env->mvp->CP0_MVPConf0 |= ((smp_cpus - 1) << CP0MVPC0_PVPE) | ((smp_cpus * cs->nr_threads - 1) << CP0MVPC0_PTC); + } } static void main_cpu_reset(void *opaque) |