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author | Marc-André Lureau <marcandre.lureau@redhat.com> | 2022-03-23 19:57:18 +0400 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2022-04-06 10:50:37 +0200 |
commit | ee3eb3a7ce7242735e6fd64cad53482e3df5a5ec (patch) | |
tree | e44d5190b97904e26b30b974002dcbfd6fbe5c80 /hw/mips/gt64xxx_pci.c | |
parent | e03b56863d2bca3e649e81531c1b0299524481ae (diff) | |
download | qemu-ee3eb3a7ce7242735e6fd64cad53482e3df5a5ec.zip qemu-ee3eb3a7ce7242735e6fd64cad53482e3df5a5ec.tar.gz qemu-ee3eb3a7ce7242735e6fd64cad53482e3df5a5ec.tar.bz2 |
Replace TARGET_WORDS_BIGENDIAN
Convert the TARGET_WORDS_BIGENDIAN macro, similarly to what was done
with HOST_BIG_ENDIAN. The new TARGET_BIG_ENDIAN macro is either 0 or 1,
and thus should always be defined to prevent misuse.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Suggested-by: Halil Pasic <pasic@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220323155743.1585078-8-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/mips/gt64xxx_pci.c')
-rw-r--r-- | hw/mips/gt64xxx_pci.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index e0ff1b5..19d0d98 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -986,7 +986,7 @@ static void gt64120_reset(DeviceState *dev) /* FIXME: Malta specific hw assumptions ahead */ /* CPU Configuration */ -#ifdef TARGET_WORDS_BIGENDIAN +#if TARGET_BIG_ENDIAN s->regs[GT_CPU] = 0x00000000; #else s->regs[GT_CPU] = 0x00001000; @@ -1097,7 +1097,7 @@ static void gt64120_reset(DeviceState *dev) s->regs[GT_TC_CONTROL] = 0x00000000; /* PCI Internal */ -#ifdef TARGET_WORDS_BIGENDIAN +#if TARGET_BIG_ENDIAN s->regs[GT_PCI0_CMD] = 0x00000000; #else s->regs[GT_PCI0_CMD] = 0x00010001; @@ -1118,7 +1118,7 @@ static void gt64120_reset(DeviceState *dev) s->regs[GT_PCI0_SSCS10_BAR] = 0x00000000; s->regs[GT_PCI0_SSCS32_BAR] = 0x01000000; s->regs[GT_PCI0_SCS3BT_BAR] = 0x1f000000; -#ifdef TARGET_WORDS_BIGENDIAN +#if TARGET_BIG_ENDIAN s->regs[GT_PCI1_CMD] = 0x00000000; #else s->regs[GT_PCI1_CMD] = 0x00010001; |