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| author | John Snow <jsnow@redhat.com> | 2014-08-21 13:44:33 -0400 |
|---|---|---|
| committer | Stefan Hajnoczi <stefanha@redhat.com> | 2014-09-22 11:39:39 +0100 |
| commit | c8b5b20f81030f8f40be041ccc23021ac602c468 (patch) | |
| tree | f34b2f4990045341b2b1dedd1fe19462cb9f550a /hw/microblaze | |
| parent | 1cd1031ddc3bdef68acbbdd0d010c09279c727ea (diff) | |
| download | qemu-c8b5b20f81030f8f40be041ccc23021ac602c468.zip qemu-c8b5b20f81030f8f40be041ccc23021ac602c468.tar.gz qemu-c8b5b20f81030f8f40be041ccc23021ac602c468.tar.bz2 | |
ahci: MSI capability should be at 0x80, not 0x50.
In the Intel ICH9 data sheet, the MSI capability offset
in the PCI configuration space for ICH9 AHCI devices is
specified to be 0x80.
Further, the PCI capability pointer should always point
to 0x80 in ICH9 devices, despite the fact that AHCI 1.3
specifies that it should be pointing to PMCAP (Which in
this instance would be 0x70) to maintain adherence to
the Intel data sheet specifications and real observed behavior.
Signed-off-by: John Snow <jsnow@redhat.com>
Message-id: 1408643079-30675-3-git-send-email-jsnow@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'hw/microblaze')
0 files changed, 0 insertions, 0 deletions