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| author | Michael Tokarev <mjt@tls.msk.ru> | 2023-07-14 14:32:24 +0300 |
|---|---|---|
| committer | Michael Tokarev <mjt@tls.msk.ru> | 2023-09-21 11:31:16 +0300 |
| commit | 9b4b4e510bcb8b1c3c4789615dce3b520aa1f1d3 (patch) | |
| tree | e04f03cda7af4a085d547f58113f9c5b0adc99d7 /hw/mem | |
| parent | 6eedbb5b0c2a1c79d377da9a08956f896ad66beb (diff) | |
| download | qemu-9b4b4e510bcb8b1c3c4789615dce3b520aa1f1d3.zip qemu-9b4b4e510bcb8b1c3c4789615dce3b520aa1f1d3.tar.gz qemu-9b4b4e510bcb8b1c3c4789615dce3b520aa1f1d3.tar.bz2 | |
hw/other: spelling fixes
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/mem')
| -rw-r--r-- | hw/mem/cxl_type3.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 4e31474..a98a157 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -538,7 +538,7 @@ static void ct3d_reg_write(void *opaque, hwaddr offset, uint64_t value, FIRST_ERROR_POINTER, cxl_err->type); } else { /* - * If no more errors, then follow recomendation of PCI spec + * If no more errors, then follow recommendation of PCI spec * r6.0 6.2.4.2 to set the first error pointer to a status * bit that will never be used. */ @@ -697,7 +697,7 @@ static void ct3_realize(PCIDevice *pci_dev, Error **errp) PCI_BASE_ADDRESS_MEM_TYPE_64, &ct3d->cxl_dstate.device_registers); - /* MSI(-X) Initailization */ + /* MSI(-X) Initialization */ rc = msix_init_exclusive_bar(pci_dev, msix_num, 4, NULL); if (rc) { goto err_address_space_free; @@ -706,7 +706,7 @@ static void ct3_realize(PCIDevice *pci_dev, Error **errp) msix_vector_use(pci_dev, i); } - /* DOE Initailization */ + /* DOE Initialization */ pcie_doe_init(pci_dev, &ct3d->doe_cdat, 0x190, doe_cdat_prot, true, 0); cxl_cstate->cdat.build_cdat_table = ct3_build_cdat_table; |