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author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-28 23:42:18 +0000 |
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committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-28 23:42:18 +0000 |
commit | 3cbee15b9a6be17645e908bf7706d582c3e17156 (patch) | |
tree | b89a5f1cfea3fdb8e95325108afc229a3ec3fa9e /hw/mac_nvram.c | |
parent | 897b4c6c4e63afebdd41de0f1a19e17ab1f4c2b8 (diff) | |
download | qemu-3cbee15b9a6be17645e908bf7706d582c3e17156.zip qemu-3cbee15b9a6be17645e908bf7706d582c3e17156.tar.gz qemu-3cbee15b9a6be17645e908bf7706d582c3e17156.tar.bz2 |
* sort the PowerPC target object files
* make PowerPC NVRAM accessors generic to be able to use a MacIO NVRAM
instead of the M48T59 one
* split PowerMac targets code:
- move all PowerMac related definitions and prototypes into hw/ppc_mac.h
- add hw/mac_dbdma.c, hw/mac_nvram.c and macio.c
which implements shared PowerMac devices
- define the g3bw machine in a new hw/ppc_oldworld.c file
* Fix the g3bw target:
- fix the Grackle host PCI device
- connect the Heathrow PIC to the PowerPC 6xx bus pins
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3475 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/mac_nvram.c')
-rw-r--r-- | hw/mac_nvram.c | 123 |
1 files changed, 123 insertions, 0 deletions
diff --git a/hw/mac_nvram.c b/hw/mac_nvram.c new file mode 100644 index 0000000..f8b8d37 --- /dev/null +++ b/hw/mac_nvram.c @@ -0,0 +1,123 @@ +/* + * PowerMac NVRAM emulation + * + * Copyright (c) 2005-2007 Fabrice Bellard + * Copyright (c) 2007 Jocelyn Mayer + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "vl.h" +#include "ppc_mac.h" + +struct MacIONVRAMState { + uint8_t data[0x2000]; +}; + +/* Direct access to NVRAM */ +uint32_t macio_nvram_read (void *opaque, uint32_t addr) +{ + MacIONVRAMState *s = opaque; + uint32_t ret; + + // printf("%s: %p addr %04x\n", __func__, s, addr); + if (addr < 0x2000) + ret = s->data[addr]; + else + ret = -1; + + return ret; +} + +void macio_nvram_write (void *opaque, uint32_t addr, uint32_t val) +{ + MacIONVRAMState *s = opaque; + + // printf("%s: %p addr %04x val %02x\n", __func__, s, addr, val); + if (addr < 0x2000) + s->data[addr] = val; +} + +/* macio style NVRAM device */ +static void macio_nvram_writeb (void *opaque, + target_phys_addr_t addr, uint32_t value) +{ + MacIONVRAMState *s = opaque; + addr = (addr >> 4) & 0x1fff; + s->data[addr] = value; + // printf("macio_nvram_writeb %04x = %02x\n", addr, value); +} + +static uint32_t macio_nvram_readb (void *opaque, target_phys_addr_t addr) +{ + MacIONVRAMState *s = opaque; + uint32_t value; + + addr = (addr >> 4) & 0x1fff; + value = s->data[addr]; + // printf("macio_nvram_readb %04x = %02x\n", addr, value); + + return value; +} + +static CPUWriteMemoryFunc *nvram_write[] = { + &macio_nvram_writeb, + &macio_nvram_writeb, + &macio_nvram_writeb, +}; + +static CPUReadMemoryFunc *nvram_read[] = { + &macio_nvram_readb, + &macio_nvram_readb, + &macio_nvram_readb, +}; + +MacIONVRAMState *macio_nvram_init (int *mem_index) +{ + MacIONVRAMState *s; + s = qemu_mallocz(sizeof(MacIONVRAMState)); + if (!s) + return NULL; + *mem_index = cpu_register_io_memory(0, nvram_read, nvram_write, s); + + return s; +} + +static uint8_t nvram_chksum (const uint8_t *buf, int n) +{ + int sum, i; + sum = 0; + for(i = 0; i < n; i++) + sum += buf[i]; + return (sum & 0xff) + (sum >> 8); +} + +/* set a free Mac OS NVRAM partition */ +void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len) +{ + uint8_t *buf; + char partition_name[12] = "wwwwwwwwwwww"; + + buf = nvr->data; + buf[0] = 0x7f; /* free partition magic */ + buf[1] = 0; /* checksum */ + buf[2] = len >> 8; + buf[3] = len; + memcpy(buf + 4, partition_name, 12); + buf[1] = nvram_chksum(buf, 16); +} |