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| author | Song Gao <gaosong@loongson.cn> | 2023-04-06 15:25:28 +0800 |
|---|---|---|
| committer | Song Gao <gaosong@loongson.cn> | 2023-05-15 19:09:33 +0800 |
| commit | 646c39b220f789158313fee5d207f370e29c586a (patch) | |
| tree | 9c46867ad4f65aa45a301f402f323fb126ddeaae /hw/loongarch | |
| parent | 78464f023b5407c636239de43cef864d76098009 (diff) | |
| download | qemu-646c39b220f789158313fee5d207f370e29c586a.zip qemu-646c39b220f789158313fee5d207f370e29c586a.tar.gz qemu-646c39b220f789158313fee5d207f370e29c586a.tar.bz2 | |
hw/loongarch/virt: Set max 256 cpus support on loongarch virt machine
Add separate macro EXTIOI_CPUS for extioi interrupt controller, extioi
only supports 4 cpu. And set macro LOONGARCH_MAX_CPUS as 256 so that
loongarch virt machine supports more cpus.
Interrupts from external devices can only be routed cpu 0-3 because
of extioi limits, cpu internal interrupt such as timer/ipi can be
triggered on all cpus.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230512100421.1867848-3-gaosong@loongson.cn>
Diffstat (limited to 'hw/loongarch')
| -rw-r--r-- | hw/loongarch/virt.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index c8a01b1..2b7588e 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -607,8 +607,13 @@ static void loongarch_irq_init(LoongArchMachineState *lams) memory_region_add_subregion(&env->system_iocsr, MAIL_SEND_ADDR, sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1)); - /* extioi iocsr memory region */ - memory_region_add_subregion(&env->system_iocsr, APIC_BASE, + /* + * extioi iocsr memory region + * only one extioi is added on loongarch virt machine + * external device interrupt can only be routed to cpu 0-3 + */ + if (cpu < EXTIOI_CPUS) + memory_region_add_subregion(&env->system_iocsr, APIC_BASE, sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), cpu)); } @@ -617,7 +622,7 @@ static void loongarch_irq_init(LoongArchMachineState *lams) * connect ext irq to the cpu irq * cpu_pin[9:2] <= intc_pin[7:0] */ - for (cpu = 0; cpu < ms->smp.cpus; cpu++) { + for (cpu = 0; cpu < MIN(ms->smp.cpus, EXTIOI_CPUS); cpu++) { cpudev = DEVICE(qemu_get_cpu(cpu)); for (pin = 0; pin < LS3A_INTC_IP; pin++) { qdev_connect_gpio_out(extioi, (cpu * 8 + pin), @@ -1026,7 +1031,7 @@ static void loongarch_class_init(ObjectClass *oc, void *data) mc->default_ram_size = 1 * GiB; mc->default_cpu_type = LOONGARCH_CPU_TYPE_NAME("la464"); mc->default_ram_id = "loongarch.ram"; - mc->max_cpus = LOONGARCH_MAX_VCPUS; + mc->max_cpus = LOONGARCH_MAX_CPUS; mc->is_default = 1; mc->default_kernel_irqchip_split = false; mc->block_default_type = IF_VIRTIO; |