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author | BALATON Zoltan <balaton@eik.bme.hu> | 2021-01-09 21:16:36 +0100 |
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committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-02-21 19:42:34 +0100 |
commit | 35e360ed67400f792fae88627268440a6326a511 (patch) | |
tree | 056faed11b0807fd8afa8090d7488ddc838b1216 /hw/isa/vt82c686.c | |
parent | 911629e6d3773a8adeab48b488fadece0d7996b1 (diff) | |
download | qemu-35e360ed67400f792fae88627268440a6326a511.zip qemu-35e360ed67400f792fae88627268440a6326a511.tar.gz qemu-35e360ed67400f792fae88627268440a6326a511.tar.bz2 |
vt82c686: Make vt82c686-pm an I/O tracing region
Previously just an empty RAM region was mapped on realize, now we add
an empty io range logging access instead. I think the pm timer should
be hooked up here but not sure guests need it. PMON on fuloong2e sets
a base address but does not seem to enable region; the pegasos2
firmware pokes some regs but continues anyway so don't know if
anything would make use of these facilities. Therefore this is just a
clean up of previous state for now and not intending to fully
implement missing functionality which could be done later if some
guests need it.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <cff9b2442d3e2e1cfbdcbc2dfbb559031b4b1cc1.1610223397.git.balaton@eik.bme.hu>
[PMD: Split original patch, this is part 1/4
(make 'vt82c686-pm' an I/O tracing region)]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'hw/isa/vt82c686.c')
-rw-r--r-- | hw/isa/vt82c686.c | 26 |
1 files changed, 24 insertions, 2 deletions
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 9c4d153..7e6a07f 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -102,6 +102,27 @@ static void pm_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int len) } } +static void pm_io_write(void *op, hwaddr addr, uint64_t data, unsigned size) +{ + trace_via_pm_io_write(addr, data, size); +} + +static uint64_t pm_io_read(void *op, hwaddr addr, unsigned size) +{ + trace_via_pm_io_read(addr, 0, size); + return 0; +} + +static const MemoryRegionOps pm_io_ops = { + .read = pm_io_read, + .write = pm_io_write, + .endianness = DEVICE_NATIVE_ENDIAN, + .impl = { + .min_access_size = 1, + .max_access_size = 1, + }, +}; + static void pm_update_sci(VT686PMState *s) { int sci_level, pmsts; @@ -154,9 +175,10 @@ static void vt82c686b_pm_realize(PCIDevice *dev, Error **errp) apm_init(dev, &s->apm, NULL, s); - memory_region_init(&s->io, OBJECT(dev), "vt82c686-pm", 64); + memory_region_init_io(&s->io, OBJECT(dev), &pm_io_ops, s, + "vt82c686-pm", 64); + memory_region_add_subregion(pci_address_space_io(dev), 0, &s->io); memory_region_set_enabled(&s->io, false); - memory_region_add_subregion(get_system_io(), 0, &s->io); acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io); |