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authorBALATON Zoltan <balaton@eik.bme.hu>2021-01-02 11:43:35 +0100
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-01-04 23:24:44 +0100
commit007b3103a393bb6123354e7d81650a761b62a66f (patch)
treefc5c89f016c121b7d18573ebe65eaecb3d95fec3 /hw/isa/vt82c686.c
parent9b0fbae2cbf8ff47c731a476d4c4ec824394fb6b (diff)
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vt82c686: Use shorter name for local variable holding object state
Rename local variable holding object state for readability and consistency. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <69655b23df2ecebbf0aff29726f4b4746f5b74de.1609584216.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'hw/isa/vt82c686.c')
-rw-r--r--hw/isa/vt82c686.c30
1 files changed, 15 insertions, 15 deletions
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index 02d6759..2633cfe 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -95,8 +95,8 @@ static const MemoryRegionOps superio_ops = {
static void vt82c686b_isa_reset(DeviceState *dev)
{
- VT82C686BISAState *vt82c = VT82C686B_ISA(dev);
- uint8_t *pci_conf = vt82c->dev.config;
+ VT82C686BISAState *s = VT82C686B_ISA(dev);
+ uint8_t *pci_conf = s->dev.config;
pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0);
pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
@@ -112,24 +112,24 @@ static void vt82c686b_isa_reset(DeviceState *dev)
pci_conf[0x5f] = 0x04;
pci_conf[0x77] = 0x10; /* GPIO Control 1/2/3/4 */
- vt82c->superio_conf.config[0xe0] = 0x3c;
- vt82c->superio_conf.config[0xe2] = 0x03;
- vt82c->superio_conf.config[0xe3] = 0xfc;
- vt82c->superio_conf.config[0xe6] = 0xde;
- vt82c->superio_conf.config[0xe7] = 0xfe;
- vt82c->superio_conf.config[0xe8] = 0xbe;
+ s->superio_conf.config[0xe0] = 0x3c;
+ s->superio_conf.config[0xe2] = 0x03;
+ s->superio_conf.config[0xe3] = 0xfc;
+ s->superio_conf.config[0xe6] = 0xde;
+ s->superio_conf.config[0xe7] = 0xfe;
+ s->superio_conf.config[0xe8] = 0xbe;
}
/* write config pci function0 registers. PCI-ISA bridge */
static void vt82c686b_write_config(PCIDevice *d, uint32_t addr,
uint32_t val, int len)
{
- VT82C686BISAState *vt686 = VT82C686B_ISA(d);
+ VT82C686BISAState *s = VT82C686B_ISA(d);
trace_via_isa_write(addr, val, len);
pci_default_write_config(d, addr, val, len);
if (addr == 0x85) { /* enable or disable super IO configure */
- memory_region_set_enabled(&vt686->superio, val & 0x2);
+ memory_region_set_enabled(&s->superio, val & 0x2);
}
}
@@ -289,7 +289,7 @@ static const VMStateDescription vmstate_via = {
/* init the PCI-to-ISA bridge */
static void vt82c686b_realize(PCIDevice *d, Error **errp)
{
- VT82C686BISAState *vt82c = VT82C686B_ISA(d);
+ VT82C686BISAState *s = VT82C686B_ISA(d);
uint8_t *pci_conf;
ISABus *isa_bus;
uint8_t *wmask;
@@ -311,15 +311,15 @@ static void vt82c686b_realize(PCIDevice *d, Error **errp)
}
}
- memory_region_init_io(&vt82c->superio, OBJECT(d), &superio_ops,
- &vt82c->superio_conf, "superio", 2);
- memory_region_set_enabled(&vt82c->superio, false);
+ memory_region_init_io(&s->superio, OBJECT(d), &superio_ops,
+ &s->superio_conf, "superio", 2);
+ memory_region_set_enabled(&s->superio, false);
/*
* The floppy also uses 0x3f0 and 0x3f1.
* But we do not emulate a floppy, so just set it here.
*/
memory_region_add_subregion(isa_bus->address_space_io, 0x3f0,
- &vt82c->superio);
+ &s->superio);
}
static void via_class_init(ObjectClass *klass, void *data)