Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging

QOM boilerplate cleanup

Documentation build fix:
* memory: Remove kernel-doc comment marker (Eduardo Habkost)

QOM cleanups:
* Rename QOM macros for consistency between
  TYPE_* and type checking constants (Eduardo Habkost)

QOM new macros:
* OBJECT_DECLARE_* and OBJECT_DEFINE_* macros (Daniel P. Berrangé)
* DECLARE_*_CHECKER macros (Eduardo Habkost)

Automated QOM boilerplate changes:
* Automated changes to use DECLARE_*_CHECKER (Eduardo Habkost
* Automated changes to use OBJECT_DECLARE* (Eduardo Habkost)

# gpg: Signature made Thu 10 Sep 2020 19:17:49 BST
# gpg:                using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6
# gpg:                issuer "ehabkost@redhat.com"
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full]
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/machine-next-pull-request: (33 commits)
  virtio-vga: Use typedef name for instance_size
  vhost-user-vga: Use typedef name for instance_size
  xilinx_axienet: Use typedef name for instance_size
  lpc_ich9: Use typedef name for instance_size
  omap_intc: Use typedef name for instance_size
  xilinx_axidma: Use typedef name for instance_size
  tusb6010: Rename TUSB to TUSB6010
  pc87312: Rename TYPE_PC87312_SUPERIO to TYPE_PC87312
  vfio: Rename PCI_VFIO to VFIO_PCI
  usb: Rename USB_SERIAL_DEV to USB_SERIAL
  sabre: Rename SABRE_DEVICE to SABRE
  rs6000_mc: Rename RS6000MC_DEVICE to RS6000MC
  filter-rewriter: Rename FILTER_COLO_REWRITER to FILTER_REWRITER
  esp: Rename ESP_STATE to ESP
  ahci: Rename ICH_AHCI to ICH9_AHCI
  vmgenid: Rename VMGENID_DEVICE to TYPE_VMGENID
  vfio: Rename VFIO_AP_DEVICE_TYPE to TYPE_VFIO_AP_DEVICE
  dev-smartcard-reader: Rename CCID_DEV_NAME to TYPE_USB_CCID_DEV
  ap-device: Rename AP_DEVICE_TYPE to TYPE_AP_DEVICE
  gpex: Fix type checking function name
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

21 files changed, 115 insertions, 82 deletions

diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index 38aabd6..b6a05e5 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -28,6 +28,7 @@
 #include "trace.h"
 #include "hw/i386/apic-msidef.h"
 #include "qapi/error.h"
+#include "qom/object.h"
 
 #define MAX_APICS 255
 #define MAX_APIC_WORDS 8
@@ -39,8 +40,9 @@
 static APICCommonState *local_apics[MAX_APICS + 1];
 
 #define TYPE_APIC "apic"
-#define APIC(obj) \
-    OBJECT_CHECK(APICCommonState, (obj), TYPE_APIC)
+/*This is reusing the APICCommonState typedef from APIC_COMMON */
+DECLARE_INSTANCE_CHECKER(APICCommonState, APIC,
+                         TYPE_APIC)
 
 static void apic_set_irq(APICCommonState *s, int vector_num, int trigger_mode);
 static void apic_update_irq(APICCommonState *s);
diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c
index 07b9514..9494185 100644
--- a/hw/intc/arm_gic_kvm.c
+++ b/hw/intc/arm_gic_kvm.c
@@ -29,20 +29,19 @@
 #include "kvm_arm.h"
 #include "gic_internal.h"
 #include "vgic_common.h"
+#include "qom/object.h"
 
 #define TYPE_KVM_ARM_GIC "kvm-arm-gic"
-#define KVM_ARM_GIC(obj) \
-     OBJECT_CHECK(GICState, (obj), TYPE_KVM_ARM_GIC)
-#define KVM_ARM_GIC_CLASS(klass) \
-     OBJECT_CLASS_CHECK(KVMARMGICClass, (klass), TYPE_KVM_ARM_GIC)
-#define KVM_ARM_GIC_GET_CLASS(obj) \
-     OBJECT_GET_CLASS(KVMARMGICClass, (obj), TYPE_KVM_ARM_GIC)
-
-typedef struct KVMARMGICClass {
+typedef struct KVMARMGICClass KVMARMGICClass;
+/* This is reusing the GICState typedef from ARM_GIC_COMMON */
+DECLARE_OBJ_CHECKERS(GICState, KVMARMGICClass,
+                     KVM_ARM_GIC, TYPE_KVM_ARM_GIC)
+
+struct KVMARMGICClass {
     ARMGICCommonClass parent_class;
     DeviceRealize parent_realize;
     void (*parent_reset)(DeviceState *dev);
-} KVMARMGICClass;
+};
 
 void kvm_arm_gic_set_irq(uint32_t num_irq, int irq, int level)
 {
diff --git a/hw/intc/arm_gicv2m.c b/hw/intc/arm_gicv2m.c
index 0b7e2b4..04d7a6d 100644
--- a/hw/intc/arm_gicv2m.c
+++ b/hw/intc/arm_gicv2m.c
@@ -34,9 +34,12 @@
 #include "sysemu/kvm.h"
 #include "qemu/log.h"
 #include "qemu/module.h"
+#include "qom/object.h"
 
 #define TYPE_ARM_GICV2M "arm-gicv2m"
-#define ARM_GICV2M(obj) OBJECT_CHECK(ARMGICv2mState, (obj), TYPE_ARM_GICV2M)
+typedef struct ARMGICv2mState ARMGICv2mState;
+DECLARE_INSTANCE_CHECKER(ARMGICv2mState, ARM_GICV2M,
+                         TYPE_ARM_GICV2M)
 
 #define GICV2M_NUM_SPI_MAX 128
 
@@ -48,7 +51,7 @@
 
 #define PRODUCT_ID_QEMU         0x51 /* ASCII code Q */
 
-typedef struct ARMGICv2mState {
+struct ARMGICv2mState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -56,7 +59,7 @@ typedef struct ARMGICv2mState {
 
     uint32_t base_spi;
     uint32_t num_spi;
-} ARMGICv2mState;
+};
 
 static void gicv2m_set_irq(void *opaque, int irq)
 {
diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c
index 46835ed..4ee9875 100644
--- a/hw/intc/arm_gicv3_its_kvm.c
+++ b/hw/intc/arm_gicv3_its_kvm.c
@@ -27,18 +27,18 @@
 #include "sysemu/kvm.h"
 #include "kvm_arm.h"
 #include "migration/blocker.h"
+#include "qom/object.h"
 
 #define TYPE_KVM_ARM_ITS "arm-its-kvm"
-#define KVM_ARM_ITS(obj) OBJECT_CHECK(GICv3ITSState, (obj), TYPE_KVM_ARM_ITS)
-#define KVM_ARM_ITS_CLASS(klass) \
-     OBJECT_CLASS_CHECK(KVMARMITSClass, (klass), TYPE_KVM_ARM_ITS)
-#define KVM_ARM_ITS_GET_CLASS(obj) \
-     OBJECT_GET_CLASS(KVMARMITSClass, (obj), TYPE_KVM_ARM_ITS)
+typedef struct KVMARMITSClass KVMARMITSClass;
+/* This is reusing the GICv3ITSState typedef from ARM_GICV3_ITS_COMMON */
+DECLARE_OBJ_CHECKERS(GICv3ITSState, KVMARMITSClass,
+                     KVM_ARM_ITS, TYPE_KVM_ARM_ITS)
 
-typedef struct KVMARMITSClass {
+struct KVMARMITSClass {
     GICv3ITSCommonClass parent_class;
     void (*parent_reset)(DeviceState *dev);
-} KVMARMITSClass;
+};
 
 
 static int kvm_its_send_msi(GICv3ITSState *s, uint32_t value, uint16_t devid)
diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c
index eddd07c..187eb05 100644
--- a/hw/intc/arm_gicv3_kvm.c
+++ b/hw/intc/arm_gicv3_kvm.c
@@ -31,6 +31,7 @@
 #include "gicv3_internal.h"
 #include "vgic_common.h"
 #include "migration/blocker.h"
+#include "qom/object.h"
 
 #ifdef DEBUG_GICV3_KVM
 #define DPRINTF(fmt, ...) \
@@ -41,12 +42,10 @@
 #endif
 
 #define TYPE_KVM_ARM_GICV3 "kvm-arm-gicv3"
-#define KVM_ARM_GICV3(obj) \
-     OBJECT_CHECK(GICv3State, (obj), TYPE_KVM_ARM_GICV3)
-#define KVM_ARM_GICV3_CLASS(klass) \
-     OBJECT_CLASS_CHECK(KVMARMGICv3Class, (klass), TYPE_KVM_ARM_GICV3)
-#define KVM_ARM_GICV3_GET_CLASS(obj) \
-     OBJECT_GET_CLASS(KVMARMGICv3Class, (obj), TYPE_KVM_ARM_GICV3)
+typedef struct KVMARMGICv3Class KVMARMGICv3Class;
+/* This is reusing the GICv3State typedef from ARM_GICV3_ITS_COMMON */
+DECLARE_OBJ_CHECKERS(GICv3State, KVMARMGICv3Class,
+                     KVM_ARM_GICV3, TYPE_KVM_ARM_GICV3)
 
 #define   KVM_DEV_ARM_VGIC_SYSREG(op0, op1, crn, crm, op2)         \
                              (ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | \
@@ -74,11 +73,11 @@
 #define ICC_IGRPEN1_EL1 \
     KVM_DEV_ARM_VGIC_SYSREG(3, 0, 12, 12, 7)
 
-typedef struct KVMARMGICv3Class {
+struct KVMARMGICv3Class {
     ARMGICv3CommonClass parent_class;
     DeviceRealize parent_realize;
     void (*parent_reset)(DeviceState *dev);
-} KVMARMGICv3Class;
+};
 
 static void kvm_arm_gicv3_set_irq(void *opaque, int irq, int level)
 {
diff --git a/hw/intc/etraxfs_pic.c b/hw/intc/etraxfs_pic.c
index 12988c7..54ed4c7 100644
--- a/hw/intc/etraxfs_pic.c
+++ b/hw/intc/etraxfs_pic.c
@@ -27,6 +27,7 @@
 #include "qemu/module.h"
 #include "hw/irq.h"
 #include "hw/qdev-properties.h"
+#include "qom/object.h"
 
 #define D(x)
 
@@ -38,8 +39,8 @@
 #define R_MAX       5
 
 #define TYPE_ETRAX_FS_PIC "etraxfs,pic"
-#define ETRAX_FS_PIC(obj) \
-    OBJECT_CHECK(struct etrax_pic, (obj), TYPE_ETRAX_FS_PIC)
+DECLARE_INSTANCE_CHECKER(struct etrax_pic, ETRAX_FS_PIC,
+                         TYPE_ETRAX_FS_PIC)
 
 struct etrax_pic
 {
diff --git a/hw/intc/exynos4210_combiner.c b/hw/intc/exynos4210_combiner.c
index 59dd27f..7b01481 100644
--- a/hw/intc/exynos4210_combiner.c
+++ b/hw/intc/exynos4210_combiner.c
@@ -36,6 +36,7 @@
 #include "hw/hw.h"
 #include "hw/irq.h"
 #include "hw/qdev-properties.h"
+#include "qom/object.h"
 
 //#define DEBUG_COMBINER
 
@@ -63,10 +64,11 @@ typedef struct CombinerGroupState {
 } CombinerGroupState;
 
 #define TYPE_EXYNOS4210_COMBINER "exynos4210.combiner"
-#define EXYNOS4210_COMBINER(obj) \
-    OBJECT_CHECK(Exynos4210CombinerState, (obj), TYPE_EXYNOS4210_COMBINER)
+typedef struct Exynos4210CombinerState Exynos4210CombinerState;
+DECLARE_INSTANCE_CHECKER(Exynos4210CombinerState, EXYNOS4210_COMBINER,
+                         TYPE_EXYNOS4210_COMBINER)
 
-typedef struct Exynos4210CombinerState {
+struct Exynos4210CombinerState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -77,7 +79,7 @@ typedef struct Exynos4210CombinerState {
     uint32_t external;          /* 1 means that this combiner is external */
 
     qemu_irq output_irq[IIC_NGRP];
-} Exynos4210CombinerState;
+};
 
 static const VMStateDescription vmstate_exynos4210_combiner_group_state = {
     .name = "exynos4210.combiner.groupstate",
diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c
index 0aa3b84..f948767 100644
--- a/hw/intc/exynos4210_gic.c
+++ b/hw/intc/exynos4210_gic.c
@@ -28,6 +28,7 @@
 #include "hw/irq.h"
 #include "hw/qdev-properties.h"
 #include "hw/arm/exynos4210.h"
+#include "qom/object.h"
 
 enum ExtGicId {
     EXT_GIC_ID_MDMA_LCD0 = 66,
@@ -264,10 +265,11 @@ uint32_t exynos4210_get_irq(uint32_t grp, uint32_t bit)
 /********* GIC part *********/
 
 #define TYPE_EXYNOS4210_GIC "exynos4210.gic"
-#define EXYNOS4210_GIC(obj) \
-    OBJECT_CHECK(Exynos4210GicState, (obj), TYPE_EXYNOS4210_GIC)
+typedef struct Exynos4210GicState Exynos4210GicState;
+DECLARE_INSTANCE_CHECKER(Exynos4210GicState, EXYNOS4210_GIC,
+                         TYPE_EXYNOS4210_GIC)
 
-typedef struct {
+struct Exynos4210GicState {
     SysBusDevice parent_obj;
 
     MemoryRegion cpu_container;
@@ -276,7 +278,7 @@ typedef struct {
     MemoryRegion dist_alias[EXYNOS4210_NCPUS];
     uint32_t num_cpu;
     DeviceState *gic;
-} Exynos4210GicState;
+};
 
 static void exynos4210_gic_set_irq(void *opaque, int irq, int level)
 {
@@ -382,16 +384,17 @@ type_init(exynos4210_gic_register_types)
  */
 
 #define TYPE_EXYNOS4210_IRQ_GATE "exynos4210.irq_gate"
-#define EXYNOS4210_IRQ_GATE(obj) \
-    OBJECT_CHECK(Exynos4210IRQGateState, (obj), TYPE_EXYNOS4210_IRQ_GATE)
+typedef struct Exynos4210IRQGateState Exynos4210IRQGateState;
+DECLARE_INSTANCE_CHECKER(Exynos4210IRQGateState, EXYNOS4210_IRQ_GATE,
+                         TYPE_EXYNOS4210_IRQ_GATE)
 
-typedef struct Exynos4210IRQGateState {
+struct Exynos4210IRQGateState {
     SysBusDevice parent_obj;
 
     uint32_t n_in;      /* inputs amount */
     uint32_t *level;    /* input levels */
     qemu_irq out;       /* output IRQ */
-} Exynos4210IRQGateState;
+};
 
 static Property exynos4210_irq_gate_properties[] = {
     DEFINE_PROP_UINT32("n_in", Exynos4210IRQGateState, n_in, 1),
diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c
index 794c643..9b34a8a 100644
--- a/hw/intc/grlib_irqmp.c
+++ b/hw/intc/grlib_irqmp.c
@@ -35,6 +35,7 @@
 #include "trace.h"
 #include "qapi/error.h"
 #include "qemu/module.h"
+#include "qom/object.h"
 
 #define IRQMP_MAX_CPU 16
 #define IRQMP_REG_SIZE 256      /* Size of memory mapped registers */
@@ -50,18 +51,20 @@
 #define FORCE_OFFSET     0x80
 #define EXTENDED_OFFSET  0xC0
 
-#define GRLIB_IRQMP(obj) OBJECT_CHECK(IRQMP, (obj), TYPE_GRLIB_IRQMP)
+typedef struct IRQMP IRQMP;
+DECLARE_INSTANCE_CHECKER(IRQMP, GRLIB_IRQMP,
+                         TYPE_GRLIB_IRQMP)
 
 typedef struct IRQMPState IRQMPState;
 
-typedef struct IRQMP {
+struct IRQMP {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
 
     IRQMPState *state;
     qemu_irq irq;
-} IRQMP;
+};
 
 struct IRQMPState {
     uint32_t level;
diff --git a/hw/intc/i8259.c b/hw/intc/i8259.c
index 51b27f6..344fd04 100644
--- a/hw/intc/i8259.c
+++ b/hw/intc/i8259.c
@@ -30,6 +30,7 @@
 #include "qemu/log.h"
 #include "hw/isa/i8259_internal.h"
 #include "trace.h"
+#include "qom/object.h"
 
 /* debug PIC */
 //#define DEBUG_PIC
@@ -37,18 +38,19 @@
 //#define DEBUG_IRQ_LATENCY
 
 #define TYPE_I8259 "isa-i8259"
-#define PIC_CLASS(class) OBJECT_CLASS_CHECK(PICClass, (class), TYPE_I8259)
-#define PIC_GET_CLASS(obj) OBJECT_GET_CLASS(PICClass, (obj), TYPE_I8259)
+typedef struct PICClass PICClass;
+DECLARE_CLASS_CHECKERS(PICClass, PIC,
+                       TYPE_I8259)
 
 /**
  * PICClass:
  * @parent_realize: The parent's realizefn.
  */
-typedef struct PICClass {
+struct PICClass {
     PICCommonClass parent_class;
 
     DeviceRealize parent_realize;
-} PICClass;
+};
 
 #ifdef DEBUG_IRQ_LATENCY
 static int64_t irq_time[16];
diff --git a/hw/intc/lm32_pic.c b/hw/intc/lm32_pic.c
index 36de670..e8b4015 100644
--- a/hw/intc/lm32_pic.c
+++ b/hw/intc/lm32_pic.c
@@ -27,9 +27,12 @@
 #include "hw/lm32/lm32_pic.h"
 #include "hw/intc/intc.h"
 #include "hw/irq.h"
+#include "qom/object.h"
 
 #define TYPE_LM32_PIC "lm32-pic"
-#define LM32_PIC(obj) OBJECT_CHECK(LM32PicState, (obj), TYPE_LM32_PIC)
+typedef struct LM32PicState LM32PicState;
+DECLARE_INSTANCE_CHECKER(LM32PicState, LM32_PIC,
+                         TYPE_LM32_PIC)
 
 struct LM32PicState {
     SysBusDevice parent_obj;
@@ -42,7 +45,6 @@ struct LM32PicState {
     /* statistics */
     uint64_t stats_irq_count[32];
 };
-typedef struct LM32PicState LM32PicState;
 
 static void update_irq(LM32PicState *s)
 {
diff --git a/hw/intc/loongson_liointc.c b/hw/intc/loongson_liointc.c
index 23ca51c..30fb375 100644
--- a/hw/intc/loongson_liointc.c
+++ b/hw/intc/loongson_liointc.c
@@ -23,6 +23,7 @@
 #include "qemu/module.h"
 #include "hw/irq.h"
 #include "hw/qdev-properties.h"
+#include "qom/object.h"
 
 #define D(x)
 
@@ -43,8 +44,8 @@
 #define R_END                   0x64
 
 #define TYPE_LOONGSON_LIOINTC "loongson.liointc"
-#define LOONGSON_LIOINTC(obj) \
-        OBJECT_CHECK(struct loongson_liointc, (obj), TYPE_LOONGSON_LIOINTC)
+DECLARE_INSTANCE_CHECKER(struct loongson_liointc, LOONGSON_LIOINTC,
+                         TYPE_LOONGSON_LIOINTC)
 
 struct loongson_liointc {
     SysBusDevice parent_obj;
diff --git a/hw/intc/nios2_iic.c b/hw/intc/nios2_iic.c
index 86d088f..aa26f05 100644
--- a/hw/intc/nios2_iic.c
+++ b/hw/intc/nios2_iic.c
@@ -25,16 +25,18 @@
 #include "hw/irq.h"
 #include "hw/sysbus.h"
 #include "cpu.h"
+#include "qom/object.h"
 
 #define TYPE_ALTERA_IIC "altera,iic"
-#define ALTERA_IIC(obj) \
-    OBJECT_CHECK(AlteraIIC, (obj), TYPE_ALTERA_IIC)
+typedef struct AlteraIIC AlteraIIC;
+DECLARE_INSTANCE_CHECKER(AlteraIIC, ALTERA_IIC,
+                         TYPE_ALTERA_IIC)
 
-typedef struct AlteraIIC {
+struct AlteraIIC {
     SysBusDevice  parent_obj;
     void         *cpu;
     qemu_irq      parent_irq;
-} AlteraIIC;
+};
 
 static void update_irq(AlteraIIC *pv)
 {
diff --git a/hw/intc/omap_intc.c b/hw/intc/omap_intc.c
index b8a1d1f..d7183d0 100644
--- a/hw/intc/omap_intc.c
+++ b/hw/intc/omap_intc.c
@@ -676,7 +676,7 @@ static const TypeInfo omap2_intc_info = {
 static const TypeInfo omap_intc_type_info = {
     .name          = TYPE_OMAP_INTC,
     .parent        = TYPE_SYS_BUS_DEVICE,
-    .instance_size = sizeof(struct omap_intr_handler_s),
+    .instance_size = sizeof(omap_intr_handler),
     .abstract      = true,
 };
 
diff --git a/hw/intc/ompic.c b/hw/intc/ompic.c
index c354427..a8ea621 100644
--- a/hw/intc/ompic.c
+++ b/hw/intc/ompic.c
@@ -15,9 +15,12 @@
 #include "hw/sysbus.h"
 #include "migration/vmstate.h"
 #include "exec/memory.h"
+#include "qom/object.h"
 
 #define TYPE_OR1K_OMPIC "or1k-ompic"
-#define OR1K_OMPIC(obj) OBJECT_CHECK(OR1KOMPICState, (obj), TYPE_OR1K_OMPIC)
+typedef struct OR1KOMPICState OR1KOMPICState;
+DECLARE_INSTANCE_CHECKER(OR1KOMPICState, OR1K_OMPIC,
+                         TYPE_OR1K_OMPIC)
 
 #define OMPIC_CTRL_IRQ_ACK  (1 << 31)
 #define OMPIC_CTRL_IRQ_GEN  (1 << 30)
@@ -37,7 +40,6 @@
 #define OMPIC_MAX_CPUS 4 /* Real max is much higher, but dont waste memory */
 #define OMPIC_ADDRSPACE_SZ (OMPIC_MAX_CPUS * 2 * 4) /* 2 32-bit regs per cpu */
 
-typedef struct OR1KOMPICState OR1KOMPICState;
 typedef struct OR1KOMPICCPUState OR1KOMPICCPUState;
 
 struct OR1KOMPICCPUState {
diff --git a/hw/intc/openpic_kvm.c b/hw/intc/openpic_kvm.c
index e4bf47d..8c8fbed 100644
--- a/hw/intc/openpic_kvm.c
+++ b/hw/intc/openpic_kvm.c
@@ -35,13 +35,15 @@
 #include "sysemu/kvm.h"
 #include "qemu/log.h"
 #include "qemu/module.h"
+#include "qom/object.h"
 
 #define GCR_RESET        0x80000000
 
-#define KVM_OPENPIC(obj) \
-    OBJECT_CHECK(KVMOpenPICState, (obj), TYPE_KVM_OPENPIC)
+typedef struct KVMOpenPICState KVMOpenPICState;
+DECLARE_INSTANCE_CHECKER(KVMOpenPICState, KVM_OPENPIC,
+                         TYPE_KVM_OPENPIC)
 
-typedef struct KVMOpenPICState {
+struct KVMOpenPICState {
     /*< private >*/
     SysBusDevice parent_obj;
     /*< public >*/
@@ -51,7 +53,7 @@ typedef struct KVMOpenPICState {
     uint32_t fd;
     uint32_t model;
     hwaddr mapped;
-} KVMOpenPICState;
+};
 
 static void kvm_openpic_set_irq(void *opaque, int n_IRQ, int level)
 {
diff --git a/hw/intc/pl190.c b/hw/intc/pl190.c
index e3bd3dd..ee32061 100644
--- a/hw/intc/pl190.c
+++ b/hw/intc/pl190.c
@@ -13,6 +13,7 @@
 #include "migration/vmstate.h"
 #include "qemu/log.h"
 #include "qemu/module.h"
+#include "qom/object.h"
 
 /* The number of virtual priority levels.  16 user vectors plus the
    unvectored IRQ.  Chained interrupts would require an additional level
@@ -21,9 +22,11 @@
 #define PL190_NUM_PRIO 17
 
 #define TYPE_PL190 "pl190"
-#define PL190(obj) OBJECT_CHECK(PL190State, (obj), TYPE_PL190)
+typedef struct PL190State PL190State;
+DECLARE_INSTANCE_CHECKER(PL190State, PL190,
+                         TYPE_PL190)
 
-typedef struct PL190State {
+struct PL190State {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -41,7 +44,7 @@ typedef struct PL190State {
     int prev_prio[PL190_NUM_PRIO];
     qemu_irq irq;
     qemu_irq fiq;
-} PL190State;
+};
 
 static const unsigned char pl190_id[] =
 { 0x90, 0x11, 0x04, 0x00, 0x0D, 0xf0, 0x05, 0xb1 };
diff --git a/hw/intc/puv3_intc.c b/hw/intc/puv3_intc.c
index 090d483..8bceede 100644
--- a/hw/intc/puv3_intc.c
+++ b/hw/intc/puv3_intc.c
@@ -12,6 +12,7 @@
 #include "qemu/osdep.h"
 #include "hw/irq.h"
 #include "hw/sysbus.h"
+#include "qom/object.h"
 
 #undef DEBUG_PUV3
 #include "hw/unicore32/puv3.h"
@@ -19,9 +20,11 @@
 #include "qemu/log.h"
 
 #define TYPE_PUV3_INTC "puv3_intc"
-#define PUV3_INTC(obj) OBJECT_CHECK(PUV3INTCState, (obj), TYPE_PUV3_INTC)
+typedef struct PUV3INTCState PUV3INTCState;
+DECLARE_INSTANCE_CHECKER(PUV3INTCState, PUV3_INTC,
+                         TYPE_PUV3_INTC)
 
-typedef struct PUV3INTCState {
+struct PUV3INTCState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -29,7 +32,7 @@ typedef struct PUV3INTCState {
 
     uint32_t reg_ICMR;
     uint32_t reg_ICPR;
-} PUV3INTCState;
+};
 
 /* Update interrupt status after enabled or pending bits have been changed.  */
 static void puv3_intc_update(PUV3INTCState *s)
diff --git a/hw/intc/s390_flic_kvm.c b/hw/intc/s390_flic_kvm.c
index dbd4e68..35d91af 100644
--- a/hw/intc/s390_flic_kvm.c
+++ b/hw/intc/s390_flic_kvm.c
@@ -24,6 +24,7 @@
 #include "hw/s390x/css.h"
 #include "migration/qemu-file-types.h"
 #include "trace.h"
+#include "qom/object.h"
 
 #define FLIC_SAVE_INITIAL_SIZE qemu_real_host_page_size
 #define FLIC_FAILED (-1UL)
@@ -569,16 +570,15 @@ static const VMStateDescription kvm_s390_flic_vmstate = {
     }
 };
 
-typedef struct KVMS390FLICStateClass {
+struct KVMS390FLICStateClass {
     S390FLICStateClass parent_class;
     DeviceRealize parent_realize;
-} KVMS390FLICStateClass;
+};
+typedef struct KVMS390FLICStateClass KVMS390FLICStateClass;
 
-#define KVM_S390_FLIC_GET_CLASS(obj) \
-    OBJECT_GET_CLASS(KVMS390FLICStateClass, (obj), TYPE_KVM_S390_FLIC)
+DECLARE_CLASS_CHECKERS(KVMS390FLICStateClass, KVM_S390_FLIC,
+                       TYPE_KVM_S390_FLIC)
 
-#define KVM_S390_FLIC_CLASS(klass) \
-    OBJECT_CLASS_CHECK(KVMS390FLICStateClass, (klass), TYPE_KVM_S390_FLIC)
 
 static void kvm_s390_flic_realize(DeviceState *dev, Error **errp)
 {
diff --git a/hw/intc/slavio_intctl.c b/hw/intc/slavio_intctl.c
index c4cf909..4a72ef5 100644
--- a/hw/intc/slavio_intctl.c
+++ b/hw/intc/slavio_intctl.c
@@ -30,6 +30,7 @@
 #include "hw/intc/intc.h"
 #include "hw/irq.h"
 #include "trace.h"
+#include "qom/object.h"
 
 //#define DEBUG_IRQ_COUNT
 
@@ -58,10 +59,11 @@ typedef struct SLAVIO_CPUINTCTLState {
 } SLAVIO_CPUINTCTLState;
 
 #define TYPE_SLAVIO_INTCTL "slavio_intctl"
-#define SLAVIO_INTCTL(obj) \
-    OBJECT_CHECK(SLAVIO_INTCTLState, (obj), TYPE_SLAVIO_INTCTL)
+typedef struct SLAVIO_INTCTLState SLAVIO_INTCTLState;
+DECLARE_INSTANCE_CHECKER(SLAVIO_INTCTLState, SLAVIO_INTCTL,
+                         TYPE_SLAVIO_INTCTL)
 
-typedef struct SLAVIO_INTCTLState {
+struct SLAVIO_INTCTLState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -73,7 +75,7 @@ typedef struct SLAVIO_INTCTLState {
     uint32_t intregm_pending;
     uint32_t intregm_disabled;
     uint32_t target_cpu;
-} SLAVIO_INTCTLState;
+};
 
 #define INTCTL_MAXADDR 0xf
 #define INTCTL_SIZE (INTCTL_MAXADDR + 1)
diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c
index 3e65e68..4c4397b 100644
--- a/hw/intc/xilinx_intc.c
+++ b/hw/intc/xilinx_intc.c
@@ -27,6 +27,7 @@
 #include "qemu/module.h"
 #include "hw/irq.h"
 #include "hw/qdev-properties.h"
+#include "qom/object.h"
 
 #define D(x)
 
@@ -41,7 +42,8 @@
 #define R_MAX       8
 
 #define TYPE_XILINX_INTC "xlnx.xps-intc"
-#define XILINX_INTC(obj) OBJECT_CHECK(struct xlx_pic, (obj), TYPE_XILINX_INTC)
+DECLARE_INSTANCE_CHECKER(struct xlx_pic, XILINX_INTC,
+                         TYPE_XILINX_INTC)
 
 struct xlx_pic
 {