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author | David Gibson <david@gibson.dropbear.id.au> | 2019-09-26 14:11:23 +1000 |
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committer | David Gibson <david@gibson.dropbear.id.au> | 2019-10-24 09:36:55 +1100 |
commit | ebd6be089b4c87554362b516c3ba530217d3f3db (patch) | |
tree | e7ca87a568404c3f11c01154f98c98c096a6da1a /hw/intc/xics_spapr.c | |
parent | 150e25f85baa7b7952ddd1bdfd7ff7801213ce51 (diff) | |
download | qemu-ebd6be089b4c87554362b516c3ba530217d3f3db.zip qemu-ebd6be089b4c87554362b516c3ba530217d3f3db.tar.gz qemu-ebd6be089b4c87554362b516c3ba530217d3f3db.tar.bz2 |
spapr, xics, xive: Move cpu_intc_create from SpaprIrq to SpaprInterruptController
This method essentially represents code which belongs to the interrupt
controller, but needs to be called on all possible intcs, rather than
just the currently active one. The "dual" version therefore calls
into the xics and xive versions confusingly.
Handle this more directly, by making it instead a method on the intc
backend, and always calling it on every backend that exists.
While we're there, streamline the error reporting a bit.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'hw/intc/xics_spapr.c')
-rw-r--r-- | hw/intc/xics_spapr.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c index 4874e6b..946311b 100644 --- a/hw/intc/xics_spapr.c +++ b/hw/intc/xics_spapr.c @@ -330,13 +330,31 @@ void spapr_dt_xics(SpaprMachineState *spapr, uint32_t nr_servers, void *fdt, _FDT(fdt_setprop_cell(fdt, node, "phandle", phandle)); } +static int xics_spapr_cpu_intc_create(SpaprInterruptController *intc, + PowerPCCPU *cpu, Error **errp) +{ + ICSState *ics = ICS_SPAPR(intc); + Object *obj; + SpaprCpuState *spapr_cpu = spapr_cpu_state(cpu); + + obj = icp_create(OBJECT(cpu), TYPE_ICP, ics->xics, errp); + if (!obj) { + return -1; + } + + spapr_cpu->icp = ICP(obj); + return 0; +} + static void ics_spapr_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); ICSStateClass *isc = ICS_CLASS(klass); + SpaprInterruptControllerClass *sicc = SPAPR_INTC_CLASS(klass); device_class_set_parent_realize(dc, ics_spapr_realize, &isc->parent_realize); + sicc->cpu_intc_create = xics_spapr_cpu_intc_create; } static const TypeInfo ics_spapr_info = { |