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authorCédric Le Goater <clg@kaod.org>2019-11-25 07:58:19 +0100
committerDavid Gibson <david@gibson.dropbear.id.au>2019-12-17 10:39:48 +1100
commitf22f56dd483b27f8c4463dbb310029dd9161bb04 (patch)
tree35aa65734c403c91a93c124abd18f317e2e5a5c9 /hw/intc/pnv_xive.c
parentdc2526e45a0ffebc88d7ed007d906f669827f834 (diff)
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ppc/pnv: Extend XiveRouter with a get_block_id() handler
When doing CAM line compares, fetch the block id from the interrupt controller which can have set the PC_TCTXT_CHIPID field. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191125065820.927-20-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/intc/pnv_xive.c')
-rw-r--r--hw/intc/pnv_xive.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
index 23e7364..43c760e 100644
--- a/hw/intc/pnv_xive.c
+++ b/hw/intc/pnv_xive.c
@@ -459,6 +459,11 @@ static int pnv_xive_match_nvt(XivePresenter *xptr, uint8_t format,
return count;
}
+static uint8_t pnv_xive_get_block_id(XiveRouter *xrtr)
+{
+ return pnv_xive_block_id(PNV_XIVE(xrtr));
+}
+
/*
* The TIMA MMIO space is shared among the chips and to identify the
* chip from which the access is being done, we extract the chip id
@@ -1890,6 +1895,7 @@ static void pnv_xive_class_init(ObjectClass *klass, void *data)
xrc->write_end = pnv_xive_write_end;
xrc->get_nvt = pnv_xive_get_nvt;
xrc->write_nvt = pnv_xive_write_nvt;
+ xrc->get_block_id = pnv_xive_get_block_id;
xnc->notify = pnv_xive_notify;
xpc->match_nvt = pnv_xive_match_nvt;