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author | Anthony Liguori <aliguori@us.ibm.com> | 2012-06-18 10:18:44 -0500 |
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committer | Anthony Liguori <aliguori@us.ibm.com> | 2012-06-18 10:18:44 -0500 |
commit | df6606f4556a752d30a4eab26c626b6c34717ea8 (patch) | |
tree | 095df894fd2f1e40f6a8a5a6393e10a953d8054d /hw/ide | |
parent | 49023ff78cf1efeb861b475c40dd04262efe61d3 (diff) | |
parent | 80aa796bf38b7ef21daa42673b4711510c450d8a (diff) | |
download | qemu-df6606f4556a752d30a4eab26c626b6c34717ea8.zip qemu-df6606f4556a752d30a4eab26c626b6c34717ea8.tar.gz qemu-df6606f4556a752d30a4eab26c626b6c34717ea8.tar.bz2 |
Merge remote-tracking branch 'mst/tags/for_anthony' into staging
* mst/tags/for_anthony:
pci_bridge_dev: fix error path in pci_bridge_dev_initfn()
qdev: release parent properties on dc->init failure
msi: Use msi/msix_present more consistently
msi: Invoke msi/msix_write_config from PCI core
msi: Guard msi/msix_write_config with msi_present
msi: Invoke msi/msix_reset from PCI core
msi: Guard msi_reset with msi_present
ahci: Clean up reset functions
intel-hda: Fix reset of MSI function
ahci: Fix reset of MSI function
rtl8139: honor RxOverflow flag in can_receive method
shpc: unparent device before free
Diffstat (limited to 'hw/ide')
-rw-r--r-- | hw/ide/ahci.c | 25 | ||||
-rw-r--r-- | hw/ide/ahci.h | 2 | ||||
-rw-r--r-- | hw/ide/ich.c | 19 |
3 files changed, 24 insertions, 22 deletions
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index 2d7d03d..e275e689 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -339,7 +339,7 @@ static void ahci_mem_write(void *opaque, target_phys_addr_t addr, case HOST_CTL: /* R/W */ if (val & HOST_CTL_RESET) { DPRINTF(-1, "HBA Reset\n"); - ahci_reset(container_of(s, AHCIPCIState, ahci)); + ahci_reset(s); } else { s->control_regs.ghc = (val & 0x3) | HOST_CTL_AHCI_EN; ahci_check_irq(s); @@ -1149,21 +1149,20 @@ void ahci_uninit(AHCIState *s) g_free(s->dev); } -void ahci_reset(void *opaque) +void ahci_reset(AHCIState *s) { - struct AHCIPCIState *d = opaque; AHCIPortRegs *pr; int i; - d->ahci.control_regs.irqstatus = 0; - d->ahci.control_regs.ghc = 0; + s->control_regs.irqstatus = 0; + s->control_regs.ghc = 0; - for (i = 0; i < d->ahci.ports; i++) { - pr = &d->ahci.dev[i].port_regs; + for (i = 0; i < s->ports; i++) { + pr = &s->dev[i].port_regs; pr->irq_stat = 0; pr->irq_mask = 0; pr->scr_ctl = 0; - ahci_reset_port(&d->ahci, i); + ahci_reset_port(s, i); } } @@ -1178,6 +1177,13 @@ static const VMStateDescription vmstate_sysbus_ahci = { .unmigratable = 1, }; +static void sysbus_ahci_reset(DeviceState *dev) +{ + SysbusAHCIState *s = DO_UPCAST(SysbusAHCIState, busdev.qdev, dev); + + ahci_reset(&s->ahci); +} + static int sysbus_ahci_init(SysBusDevice *dev) { SysbusAHCIState *s = FROM_SYSBUS(SysbusAHCIState, dev); @@ -1185,8 +1191,6 @@ static int sysbus_ahci_init(SysBusDevice *dev) sysbus_init_mmio(dev, &s->ahci.mem); sysbus_init_irq(dev, &s->ahci.irq); - - qemu_register_reset(ahci_reset, &s->ahci); return 0; } @@ -1203,6 +1207,7 @@ static void sysbus_ahci_class_init(ObjectClass *klass, void *data) sbc->init = sysbus_ahci_init; dc->vmsd = &vmstate_sysbus_ahci; dc->props = sysbus_ahci_properties; + dc->reset = sysbus_ahci_reset; } static TypeInfo sysbus_ahci_info = { diff --git a/hw/ide/ahci.h b/hw/ide/ahci.h index b223d2c..ec1b6a5 100644 --- a/hw/ide/ahci.h +++ b/hw/ide/ahci.h @@ -332,6 +332,6 @@ typedef struct NCQFrame { void ahci_init(AHCIState *s, DeviceState *qdev, int ports); void ahci_uninit(AHCIState *s); -void ahci_reset(void *opaque); +void ahci_reset(AHCIState *s); #endif /* HW_IDE_AHCI_H */ diff --git a/hw/ide/ich.c b/hw/ide/ich.c index 560ae37..e3eaaea 100644 --- a/hw/ide/ich.c +++ b/hw/ide/ich.c @@ -84,6 +84,13 @@ static const VMStateDescription vmstate_ahci = { .unmigratable = 1, }; +static void pci_ich9_reset(DeviceState *dev) +{ + struct AHCIPCIState *d = DO_UPCAST(struct AHCIPCIState, card.qdev, dev); + + ahci_reset(&d->ahci); +} + static int pci_ich9_ahci_init(PCIDevice *dev) { struct AHCIPCIState *d; @@ -102,8 +109,6 @@ static int pci_ich9_ahci_init(PCIDevice *dev) /* XXX Software should program this register */ d->card.config[0x90] = 1 << 6; /* Address Map Register - AHCI mode */ - qemu_register_reset(ahci_reset, d); - msi_init(dev, 0x50, 1, true, false); d->ahci.irq = d->card.irq[0]; @@ -133,19 +138,11 @@ static int pci_ich9_uninit(PCIDevice *dev) d = DO_UPCAST(struct AHCIPCIState, card, dev); msi_uninit(dev); - qemu_unregister_reset(ahci_reset, d); ahci_uninit(&d->ahci); return 0; } -static void pci_ich9_write_config(PCIDevice *pci, uint32_t addr, - uint32_t val, int len) -{ - pci_default_write_config(pci, addr, val, len); - msi_write_config(pci, addr, val, len); -} - static void ich_ahci_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -153,12 +150,12 @@ static void ich_ahci_class_init(ObjectClass *klass, void *data) k->init = pci_ich9_ahci_init; k->exit = pci_ich9_uninit; - k->config_write = pci_ich9_write_config; k->vendor_id = PCI_VENDOR_ID_INTEL; k->device_id = PCI_DEVICE_ID_INTEL_82801IR; k->revision = 0x02; k->class_id = PCI_CLASS_STORAGE_SATA; dc->vmsd = &vmstate_ahci; + dc->reset = pci_ich9_reset; } static TypeInfo ich_ahci_info = { |