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author | BALATON Zoltan <balaton@eik.bme.hu> | 2019-01-25 14:52:11 -0500 |
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committer | John Snow <jsnow@redhat.com> | 2019-01-25 14:52:11 -0500 |
commit | c9ebc75dc24f99e881414e7f35544041f678235a (patch) | |
tree | b65d1de3d381547bfc4fbff70b8200b74631d971 /hw/ide/pci.c | |
parent | e210ec87b93cf94212b5f522d514115dc3604975 (diff) | |
download | qemu-c9ebc75dc24f99e881414e7f35544041f678235a.zip qemu-c9ebc75dc24f99e881414e7f35544041f678235a.tar.gz qemu-c9ebc75dc24f99e881414e7f35544041f678235a.tar.bz2 |
cmd646: Move PCI IDE specific functions to ide/pci.c
The io mem ops callbacks are not specific to CMD646 but really follow
the PCI IDE spec so move these from cmd646.c to pci.c to allow other
PCI IDE implementations to use them.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: John Snow <jsnow@redhat.com>
Message-id: a2b1b2b74afdc78330b8b75605687f683a249635.1547166960.git.balaton@eik.bme.hu
Signed-off-by: John Snow <jsnow@redhat.com>
Diffstat (limited to 'hw/ide/pci.c')
-rw-r--r-- | hw/ide/pci.c | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/hw/ide/pci.c b/hw/ide/pci.c index b75154f..942613a 100644 --- a/hw/ide/pci.c +++ b/hw/ide/pci.c @@ -36,6 +36,71 @@ (IDE_RETRY_DMA | IDE_RETRY_PIO | \ IDE_RETRY_READ | IDE_RETRY_FLUSH) +static uint64_t pci_ide_cmd_read(void *opaque, hwaddr addr, unsigned size) +{ + IDEBus *bus = opaque; + + if (addr != 2 || size != 1) { + return ((uint64_t)1 << (size * 8)) - 1; + } + return ide_status_read(bus, addr + 2); +} + +static void pci_ide_cmd_write(void *opaque, hwaddr addr, + uint64_t data, unsigned size) +{ + IDEBus *bus = opaque; + + if (addr != 2 || size != 1) { + return; + } + ide_cmd_write(bus, addr + 2, data); +} + +const MemoryRegionOps pci_ide_cmd_le_ops = { + .read = pci_ide_cmd_read, + .write = pci_ide_cmd_write, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + +static uint64_t pci_ide_data_read(void *opaque, hwaddr addr, unsigned size) +{ + IDEBus *bus = opaque; + + if (size == 1) { + return ide_ioport_read(bus, addr); + } else if (addr == 0) { + if (size == 2) { + return ide_data_readw(bus, addr); + } else { + return ide_data_readl(bus, addr); + } + } + return ((uint64_t)1 << (size * 8)) - 1; +} + +static void pci_ide_data_write(void *opaque, hwaddr addr, + uint64_t data, unsigned size) +{ + IDEBus *bus = opaque; + + if (size == 1) { + ide_ioport_write(bus, addr, data); + } else if (addr == 0) { + if (size == 2) { + ide_data_writew(bus, addr, data); + } else { + ide_data_writel(bus, addr, data); + } + } +} + +const MemoryRegionOps pci_ide_data_le_ops = { + .read = pci_ide_data_read, + .write = pci_ide_data_write, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + static void bmdma_start_dma(IDEDMA *dma, IDEState *s, BlockCompletionFunc *dma_cb) { |