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| author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-02-01 19:26:20 +0000 |
|---|---|---|
| committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-02-01 19:26:20 +0000 |
| commit | 173a543b36d0b2491438cf1dcc2c7bb34d59bb5c (patch) | |
| tree | 59856c5e715a8d56334c9dc1ccfba69f341a72fa /hw/ide.c | |
| parent | 4ebcf884836887324848291032a385fe0df7b0af (diff) | |
| download | qemu-173a543b36d0b2491438cf1dcc2c7bb34d59bb5c.zip qemu-173a543b36d0b2491438cf1dcc2c7bb34d59bb5c.tar.gz qemu-173a543b36d0b2491438cf1dcc2c7bb34d59bb5c.tar.bz2 | |
Add and use #defines for PCI device classes
This patch adds and uses #defines for PCI device classes and subclases,
using a new pci_config_set_class() function, similar to the recently
added pci_config_set_vendor_id() and pci_config_set_device_id().
Change since v1: fixed compilation of hw/sun4u.c
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6491 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/ide.c')
| -rw-r--r-- | hw/ide.c | 9 |
1 files changed, 3 insertions, 6 deletions
@@ -3353,8 +3353,7 @@ void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table, pci_conf[0x08] = 0x07; // IDE controller revision pci_conf[0x09] = 0x8f; - pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE - pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage + pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_IDE); pci_conf[0x0e] = 0x00; // header_type pci_conf[0x51] = 0x04; // enable IDE0 @@ -3423,8 +3422,7 @@ void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371SB_1); pci_conf[0x09] = 0x80; // legacy ATA mode - pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE - pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage + pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_IDE); pci_conf[0x0e] = 0x00; // header_type qemu_register_reset(piix3_reset, d); @@ -3460,8 +3458,7 @@ void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB); pci_conf[0x09] = 0x80; // legacy ATA mode - pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE - pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage + pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_IDE); pci_conf[0x0e] = 0x00; // header_type qemu_register_reset(piix3_reset, d); |