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authorBernhard Beschow <shentey@gmail.com>2023-10-07 14:38:18 +0200
committerMichael S. Tsirkin <mst@redhat.com>2023-10-22 05:18:16 -0400
commit56b1f50e3c101bfe5f52bac73de0e88438de11bd (patch)
tree562a16134de6d537ce29ea2a5c7c65ec0e0bbfd9 /hw/i386
parent64127940aeb674cb5d9d8d0ea4ca20591bf2b010 (diff)
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hw/i386/pc: Wire RTC ISA IRQs in south bridges
Makes the south bridges a bit more self-contained and aligns PIIX3 more with PIIX4. The latter is needed for consolidating the PIIX south bridges. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20231007123843.127151-11-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/i386')
-rw-r--r--hw/i386/pc.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 7e6c4dc..355e1b7 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1244,12 +1244,9 @@ void pc_basic_device_init(struct PCMachineState *pcms,
pit_isa_irq = -1;
pit_alt_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_PIT_INT);
rtc_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_RTC_INT);
+
+ /* overwrite connection created by south bridge */
qdev_connect_gpio_out(DEVICE(rtc_state), 0, rtc_irq);
- } else {
- uint32_t irq = object_property_get_uint(OBJECT(rtc_state),
- "irq",
- &error_fatal);
- isa_connect_gpio_out(rtc_state, 0, irq);
}
object_property_add_alias(OBJECT(pcms), "rtc-time", OBJECT(rtc_state),