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| author | Fabian Aggeler <aggelerf@ethz.ch> | 2015-05-12 11:57:18 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-05-12 11:57:18 +0100 |
| commit | 7c0fa108d918ab818e49c4588ab290004d6b532e (patch) | |
| tree | df86bc392515e9da00bb264aca5bc335ef9adeb1 /hw/i386/pc_q35.c | |
| parent | 8150847061f8d2606101bfff77cc6ec86b081ab0 (diff) | |
| download | qemu-7c0fa108d918ab818e49c4588ab290004d6b532e.zip qemu-7c0fa108d918ab818e49c4588ab290004d6b532e.tar.gz qemu-7c0fa108d918ab818e49c4588ab290004d6b532e.tar.bz2 | |
hw/intc/arm_gic: Handle grouping for GICC_HPPIR
Grouping (GICv2) and Security Extensions change the behaviour of reads
of the highest priority pending interrupt register (ICCHPIR/GICC_HPPIR).
Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch>
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1430502643-25909-12-git-send-email-peter.maydell@linaro.org
Message-id: 1429113742-8371-12-git-send-email-greg.bellows@linaro.org
[PMM: make utility fn static; coding style fixes; AckCtl has an effect
for GICv2 without security extensions as well; removed checks on enable
bits because these are done when we set current_pending[cpu]]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/i386/pc_q35.c')
0 files changed, 0 insertions, 0 deletions