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| author | Bernhard Beschow <shentey@gmail.com> | 2023-04-03 09:41:21 +0200 |
|---|---|---|
| committer | Anthony PERARD <anthony.perard@citrix.com> | 2023-06-07 15:07:10 +0100 |
| commit | 60a9eb57f337ee36cb9140154a83edb2c41f00c6 (patch) | |
| tree | c0db0ff9d4edab8068a0e8e2d9f3cee2904ed995 /hw/i386/pc_piix.c | |
| parent | a58a31a6a18ab650c6b676eccf98b6f68ac672d0 (diff) | |
| download | qemu-60a9eb57f337ee36cb9140154a83edb2c41f00c6.zip qemu-60a9eb57f337ee36cb9140154a83edb2c41f00c6.tar.gz qemu-60a9eb57f337ee36cb9140154a83edb2c41f00c6.tar.bz2 | |
hw/isa/piix3: Wire up Xen PCI IRQ handling outside of PIIX3
xen_intx_set_irq() doesn't depend on PIIX3State. In order to resolve
TYPE_PIIX3_XEN_DEVICE and in order to make Xen agnostic about the
precise south bridge being used, set up Xen's PCI IRQ handling of PIIX3
in the board.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Anthony PERARD <anthony.perard@citrix.com>
Tested-by: Chuck Zmudzinski <brchuckz@aol.com>
Message-Id: <20230312120221.99183-4-shentey@gmail.com>
Message-Id: <20230403074124.3925-5-shentey@gmail.com>
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Diffstat (limited to 'hw/i386/pc_piix.c')
| -rw-r--r-- | hw/i386/pc_piix.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index d5b0dcd..11af191 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -71,6 +71,7 @@ #include "kvm/kvm-cpu.h" #define MAX_IDE_BUS 2 +#define XEN_IOAPIC_NUM_PIRQS 128ULL #ifdef CONFIG_IDE_ISA static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; @@ -238,6 +239,18 @@ static void pc_init1(MachineState *machine, pcms->bus = pci_bus; pci_dev = pci_create_simple_multifunction(pci_bus, -1, true, type); + + if (xen_enabled()) { + /* + * Xen supports additional interrupt routes from the PCI devices to + * the IOAPIC: the four pins of each PCI device on the bus are also + * connected to the IOAPIC directly. + * These additional routes can be discovered through ACPI. + */ + pci_bus_irqs(pci_bus, xen_intx_set_irq, pci_dev, + XEN_IOAPIC_NUM_PIRQS); + } + piix3 = PIIX3_PCI_DEVICE(pci_dev); piix3->pic = x86ms->gsi; piix3_devfn = piix3->dev.devfn; |