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| author | Michael Roth <michael.roth@amd.com> | 2021-07-07 19:36:23 -0500 |
|---|---|---|
| committer | Eduardo Habkost <ehabkost@redhat.com> | 2021-07-13 09:13:29 -0400 |
| commit | a7a0da844d299971bdbf99665bd63398668dde83 (patch) | |
| tree | 5f037a3755255de83a7c4f788cec7a5889ad77e9 /hw/i386/pc.c | |
| parent | cce087f628c651e905f5e2097d9bb9f678689669 (diff) | |
| download | qemu-a7a0da844d299971bdbf99665bd63398668dde83.zip qemu-a7a0da844d299971bdbf99665bd63398668dde83.tar.gz qemu-a7a0da844d299971bdbf99665bd63398668dde83.tar.bz2 | |
target/i386: suppress CPUID leaves not defined by the CPU vendor
Currently all built-in CPUs report cache information via CPUID leaves 2
and 4, but these have never been defined for AMD. In the case of
SEV-SNP this can cause issues with CPUID enforcement. Address this by
allowing CPU types to suppress these via a new "x-vendor-cpuid-only"
CPU property, which is true by default, but switched off for older
machine types to maintain compatibility.
Cc: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Cc: Richard Henderson <richard.henderson@linaro.org>
Cc: Igor Mammedov <imammedo@redhat.com>
Cc: zhenwei pi <pizhenwei@bytedance.com>
Suggested-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Michael Roth <michael.roth@amd.com>
Message-Id: <20210708003623.18665-1-michael.roth@amd.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'hw/i386/pc.c')
| -rw-r--r-- | hw/i386/pc.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 8e1220d..aa79c5e 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -98,6 +98,7 @@ GlobalProperty pc_compat_6_0[] = { { "qemu64" "-" TYPE_X86_CPU, "family", "6" }, { "qemu64" "-" TYPE_X86_CPU, "model", "6" }, { "qemu64" "-" TYPE_X86_CPU, "stepping", "3" }, + { TYPE_X86_CPU, "x-vendor-cpuid-only", "off" }, }; const size_t pc_compat_6_0_len = G_N_ELEMENTS(pc_compat_6_0); |