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authorDong Xu Wang <wdongxu@linux.vnet.ibm.com>2011-11-29 16:52:39 +0800
committerStefan Hajnoczi <stefanha@linux.vnet.ibm.com>2011-12-06 09:56:41 +0000
commit66a0a2cb81fb9d0e4e372a21cb62c1d0d877b112 (patch)
treeca94e118ff09a096aed511e5859eb8f5ecaf3844 /hw/gusemu_hal.c
parent3a93113a002db694657fcf24ff0c96aef83303b8 (diff)
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fix spelling in hw sub directory
Correct obvious spelling errors in qemu/hw directory. Signed-off-by: Dong Xu Wang <wdongxu@linux.vnet.ibm.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Diffstat (limited to 'hw/gusemu_hal.c')
-rw-r--r--hw/gusemu_hal.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/gusemu_hal.c b/hw/gusemu_hal.c
index c6f9537..6096690 100644
--- a/hw/gusemu_hal.c
+++ b/hw/gusemu_hal.c
@@ -502,7 +502,7 @@ void gus_dma_transferdata(GUSEmuState * state, char *dma_addr, unsigned int coun
/* this function gets called by the callback function as soon as a DMA transfer is about to start
* dma_addr is a translated address within accessible memory, not the physical one,
* count is (real dma count register)+1
- * note that the amount of bytes transfered is fully determined by values in the DMA registers
+ * note that the amount of bytes transferred is fully determined by values in the DMA registers
* do not forget to update DMA states after transferring the entire block:
* DREQ cleared & TC asserted after the _whole_ transfer */
@@ -517,7 +517,7 @@ void gus_dma_transferdata(GUSEmuState * state, char *dma_addr, unsigned int coun
int offset = (GUSregw(GUS42DMAStart) << 4) + (GUSregb(GUS50DMAHigh) & 0xf);
if (state->gusdma >= 4)
offset = (offset & 0xc0000) + (2 * (offset & 0x1fff0)); /* 16 bit address translation */
- destaddr = (char *) state->himemaddr + offset; /* wavetable RAM adress */
+ destaddr = (char *) state->himemaddr + offset; /* wavetable RAM address */
}
GUSregw(GUS42DMAStart) += (GUSword) (count >> 4); /* ToDo: add 16bit GUS page limit? */