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| author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-02-01 19:26:20 +0000 |
|---|---|---|
| committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-02-01 19:26:20 +0000 |
| commit | 173a543b36d0b2491438cf1dcc2c7bb34d59bb5c (patch) | |
| tree | 59856c5e715a8d56334c9dc1ccfba69f341a72fa /hw/grackle_pci.c | |
| parent | 4ebcf884836887324848291032a385fe0df7b0af (diff) | |
| download | qemu-173a543b36d0b2491438cf1dcc2c7bb34d59bb5c.zip qemu-173a543b36d0b2491438cf1dcc2c7bb34d59bb5c.tar.gz qemu-173a543b36d0b2491438cf1dcc2c7bb34d59bb5c.tar.bz2 | |
Add and use #defines for PCI device classes
This patch adds and uses #defines for PCI device classes and subclases,
using a new pci_config_set_class() function, similar to the recently
added pci_config_set_vendor_id() and pci_config_set_device_id().
Change since v1: fixed compilation of hw/sun4u.c
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6491 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/grackle_pci.c')
| -rw-r--r-- | hw/grackle_pci.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c index 40c73df..5161727 100644 --- a/hw/grackle_pci.c +++ b/hw/grackle_pci.c @@ -148,8 +148,7 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic) pci_config_set_device_id(d->config, PCI_DEVICE_ID_MOTOROLA_MPC106); d->config[0x08] = 0x00; // revision d->config[0x09] = 0x01; - d->config[0x0a] = 0x00; // class_sub = host - d->config[0x0b] = 0x06; // class_base = PCI_bridge + pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST); d->config[0x0e] = 0x00; // header_type #if 0 @@ -157,8 +156,7 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic) pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_DEC); pci_config_set_device_id(d->config, PCI_DEVICE_ID_DEC_21154); d->config[0x08] = 0x02; // revision - d->config[0x0a] = 0x04; // class_sub = pci2pci - d->config[0x0b] = 0x06; // class_base = PCI_bridge + pci_config_set_class(d->config, PCI_CLASS_BRIDGE_PCI); d->config[0x0e] = 0x01; // header_type d->config[0x18] = 0x0; // primary_bus |