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author | Blue Swirl <blauwirbel@gmail.com> | 2010-01-26 21:59:57 +0000 |
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committer | Blue Swirl <blauwirbel@gmail.com> | 2010-01-26 21:59:57 +0000 |
commit | 776e1bbb6cf4fe66a93c1a5dd814bbb650deca00 (patch) | |
tree | 1b191a039b07ec2e09a229300aa586d9839a57b4 /hw/grackle_pci.c | |
parent | f139a4125682ecd45d96c2d1523443d1be65405c (diff) | |
download | qemu-776e1bbb6cf4fe66a93c1a5dd814bbb650deca00.zip qemu-776e1bbb6cf4fe66a93c1a5dd814bbb650deca00.tar.gz qemu-776e1bbb6cf4fe66a93c1a5dd814bbb650deca00.tar.bz2 |
PCI: fix bridge configuration
PCI bridges' qdev info structures must indicate bridge header type,
otherwise critical bridge registers (esp. PCI_PRIMARY_BUS,
PCI_SECONDARY_BUS, PCI_SUBORDINATE_BUS) will not be writable.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/grackle_pci.c')
-rw-r--r-- | hw/grackle_pci.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c index ee4fed5..f455c59 100644 --- a/hw/grackle_pci.c +++ b/hw/grackle_pci.c @@ -181,6 +181,7 @@ static PCIDeviceInfo dec_21154_pci_host_info = { .qdev.name = "dec-21154", .qdev.size = sizeof(PCIDevice), .init = dec_21154_pci_host_init, + .header_type = PCI_HEADER_TYPE_BRIDGE, }; static void grackle_register_devices(void) |