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author | Peter Maydell <peter.maydell@linaro.org> | 2021-07-02 11:40:17 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2021-07-09 16:09:12 +0100 |
commit | 0642e159d2351a8fd7d03f78b5d97010cd514561 (patch) | |
tree | 64748aa62f53d6dc55db94c6e5d482f295f879e3 /hw/gpio | |
parent | ef4989b0a898ae20a974d261b14d4e5c1c097292 (diff) | |
download | qemu-0642e159d2351a8fd7d03f78b5d97010cd514561.zip qemu-0642e159d2351a8fd7d03f78b5d97010cd514561.tar.gz qemu-0642e159d2351a8fd7d03f78b5d97010cd514561.tar.bz2 |
hw/gpio/pl061: Document a shortcoming in our implementation
The Luminary PL061s in the Stellaris LM3S9695 don't all have the same
reset value for GPIOPUR. We can get away with not letting the board
configure the PUR reset value because we don't actually wire anything
up to the lines which should reset to pull-up. Add a comment noting
this omission.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'hw/gpio')
-rw-r--r-- | hw/gpio/pl061.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/hw/gpio/pl061.c b/hw/gpio/pl061.c index 4002ab5..899be86 100644 --- a/hw/gpio/pl061.c +++ b/hw/gpio/pl061.c @@ -453,6 +453,15 @@ static void pl061_enter_reset(Object *obj, ResetType type) trace_pl061_reset(DEVICE(s)->canonical_path); /* reset values from PL061 TRM, Stellaris LM3S5P31 & LM3S8962 Data Sheet */ + + /* + * FIXME: For the LM3S6965, not all of the PL061 instances have the + * same reset values for GPIOPUR, GPIOAFSEL and GPIODEN, so in theory + * we should allow the board to configure these via properties. + * In practice, we don't wire anything up to the affected GPIO lines + * (PB7, PC0, PC1, PC2, PC3 -- they're used for JTAG), so we can + * get away with this inaccuracy. + */ s->data = 0; s->old_in_data = 0; s->dir = 0; |