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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-05-24 18:45:03 +0200 |
|---|---|---|
| committer | Laurent Vivier <laurent@vivier.eu> | 2020-06-09 19:01:56 +0200 |
| commit | 3b34ee6780f5ebf4c641a7522288b9e7e4e123d6 (patch) | |
| tree | 591a4e302695d9a7e2ccdc767e02cc284076294f /hw/gpio/puv3_gpio.c | |
| parent | 449fd1fc0041facd8c9bef0c7eb8d63fd0418a6a (diff) | |
| download | qemu-3b34ee6780f5ebf4c641a7522288b9e7e4e123d6.zip qemu-3b34ee6780f5ebf4c641a7522288b9e7e4e123d6.tar.gz qemu-3b34ee6780f5ebf4c641a7522288b9e7e4e123d6.tar.bz2 | |
hw/unicore32/puv3: Use qemu_log_mask(ERROR) instead of debug printf()
Replace some debug printf() calls by qemu_log_mask(LOG_GUEST_ERROR).
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20200524164503.11944-1-f4bug@amsat.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'hw/gpio/puv3_gpio.c')
| -rw-r--r-- | hw/gpio/puv3_gpio.c | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/hw/gpio/puv3_gpio.c b/hw/gpio/puv3_gpio.c index d19e342..7362b67 100644 --- a/hw/gpio/puv3_gpio.c +++ b/hw/gpio/puv3_gpio.c @@ -15,6 +15,7 @@ #undef DEBUG_PUV3 #include "hw/unicore32/puv3.h" #include "qemu/module.h" +#include "qemu/log.h" #define TYPE_PUV3_GPIO "puv3_gpio" #define PUV3_GPIO(obj) OBJECT_CHECK(PUV3GPIOState, (obj), TYPE_PUV3_GPIO) @@ -47,7 +48,9 @@ static uint64_t puv3_gpio_read(void *opaque, hwaddr offset, ret = s->reg_GPIR; break; default: - DPRINTF("Bad offset 0x%x\n", offset); + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Bad read offset 0x%"HWADDR_PRIx"\n", + __func__, offset); } DPRINTF("offset 0x%x, value 0x%x\n", offset, ret); @@ -68,14 +71,16 @@ static void puv3_gpio_write(void *opaque, hwaddr offset, if (s->reg_GPDR & value) { s->reg_GPLR |= value; } else { - DPRINTF("Write gpio input port error!"); + qemu_log_mask(LOG_GUEST_ERROR, "%s: Write gpio input port\n", + __func__); } break; case 0x0c: if (s->reg_GPDR & value) { s->reg_GPLR &= ~value; } else { - DPRINTF("Write gpio input port error!"); + qemu_log_mask(LOG_GUEST_ERROR, "%s: Write gpio input port\n", + __func__); } break; case 0x10: /* GRER */ @@ -86,7 +91,9 @@ static void puv3_gpio_write(void *opaque, hwaddr offset, s->reg_GPIR = value; break; default: - DPRINTF("Bad offset 0x%x\n", offset); + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Bad write offset 0x%"HWADDR_PRIx"\n", + __func__, offset); } } |