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| author | David Hoover <spm@boiteauxlettres.sent.at> | 2014-09-12 14:06:47 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-09-12 14:06:47 +0100 |
| commit | c3c8d6b3ddc881fb2ebd651e320cda36b2ec079b (patch) | |
| tree | c05da2ccb0ac4652634c3bfa54f917763900c99c /hw/gpio/pl061.c | |
| parent | f022b8e95379b0433d13509706b66f38fc15dde8 (diff) | |
| download | qemu-c3c8d6b3ddc881fb2ebd651e320cda36b2ec079b.zip qemu-c3c8d6b3ddc881fb2ebd651e320cda36b2ec079b.tar.gz qemu-c3c8d6b3ddc881fb2ebd651e320cda36b2ec079b.tar.bz2 | |
cpu-exec.c: Allow disabling of IRQs on ARM Cortex-M CPUs
Correct an error in the logic for deciding whether we can
take an IRQ interrupt which meant that on M profile cores
it was never possible to disable them.
The design here is still bogus in that M profile doesn't
have separate "IRQ" and "FIQ", which are an A/R profile
concept; we should ideally implement the proper priority
based scheme.
Signed-off-by: David Hoover <spm@boiteauxlettres.sent.at>
[PMM: Wrote a proper commit message]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/gpio/pl061.c')
0 files changed, 0 insertions, 0 deletions