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author | Peter Maydell <peter.maydell@linaro.org> | 2018-08-20 11:24:33 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2018-08-20 11:24:33 +0100 |
commit | c193304d4f9ef21c51ff412f6279ad459eedd438 (patch) | |
tree | abf8cdbad8155c8c082e65cb7a4137fcd96513e2 /hw/dma | |
parent | 112a829f8f0add64f73bfea66c153355ea596da9 (diff) | |
download | qemu-c193304d4f9ef21c51ff412f6279ad459eedd438.zip qemu-c193304d4f9ef21c51ff412f6279ad459eedd438.tar.gz qemu-c193304d4f9ef21c51ff412f6279ad459eedd438.tar.bz2 |
hw/dma/pl080: Provide device reset function
The PL080/PL081 model is missing a reset function; implement it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'hw/dma')
-rw-r--r-- | hw/dma/pl080.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/hw/dma/pl080.c b/hw/dma/pl080.c index 8f9f3e0..a7aacad 100644 --- a/hw/dma/pl080.c +++ b/hw/dma/pl080.c @@ -348,6 +348,30 @@ static const MemoryRegionOps pl080_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; +static void pl080_reset(DeviceState *dev) +{ + PL080State *s = PL080(dev); + int i; + + s->tc_int = 0; + s->tc_mask = 0; + s->err_int = 0; + s->err_mask = 0; + s->conf = 0; + s->sync = 0; + s->req_single = 0; + s->req_burst = 0; + s->running = 0; + + for (i = 0; i < s->nchannels; i++) { + s->chan[i].src = 0; + s->chan[i].dest = 0; + s->chan[i].lli = 0; + s->chan[i].ctrl = 0; + s->chan[i].conf = 0; + } +} + static void pl080_init(Object *obj) { SysBusDevice *sbd = SYS_BUS_DEVICE(obj); @@ -393,6 +417,7 @@ static void pl080_class_init(ObjectClass *oc, void *data) dc->vmsd = &vmstate_pl080; dc->realize = pl080_realize; dc->props = pl080_properties; + dc->reset = pl080_reset; } static const TypeInfo pl080_info = { |