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author | Anthony Liguori <anthony@codemonkey.ws> | 2013-09-11 14:46:52 -0500 |
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committer | Anthony Liguori <anthony@codemonkey.ws> | 2013-09-11 14:46:52 -0500 |
commit | 2d1fe1873a984d1c2c89ffa3d12949cafc718551 (patch) | |
tree | 1834a6565cb7c30db23589811f8d5326a49e3462 /hw/display | |
parent | 6f52e51bb7706562634e5dd2755a1e9b8a5037cc (diff) | |
parent | 6a49fa95c98cd155f7aaf48e5c6fa6bb6adea862 (diff) | |
download | qemu-2d1fe1873a984d1c2c89ffa3d12949cafc718551.zip qemu-2d1fe1873a984d1c2c89ffa3d12949cafc718551.tar.gz qemu-2d1fe1873a984d1c2c89ffa3d12949cafc718551.tar.bz2 |
Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20130910' into staging
ARM queue:
* aarch64 preparation patchset (excluding the defconfigs, so this
doesn't actually enable the new targets yet)
* minor bugfixes and cleanups
* disable "-cpu any" in system emulation mode
* fix ARMv7M stack alignment on reset
# gpg: Signature made Tue 10 Sep 2013 01:46:11 PM CDT using RSA key ID 14360CDE
# gpg: Can't check signature: public key not found
# By Alexander Graf (13) and others
# Via Peter Maydell
* pmaydell/tags/pull-target-arm-20130910: (28 commits)
configure: Add handling code for AArch64 targets
linux-user: Add AArch64 support
linux-user: Allow targets to specify a minimum uname release
linux-user: Add AArch64 termbits.h definitions
linux-user: Implement cpu_set_tls() and cpu_clone_regs() for AArch64
linux-user: Make sure NWFPE code is 32 bit ARM only
linux-user: Add signal handling for AArch64
linux-user: Fix up AArch64 syscall handlers
linux-user: Add syscall number definitions for AArch64
linux-user: Add cpu loop for AArch64
linux-user: Don't treat AArch64 cpu names specially
target-arm: Add AArch64 gdbstub support
target-arm: Add AArch64 translation stub
target-arm: Prepare translation for AArch64 code
target-arm: Disable 32 bit CPUs in 64 bit linux-user builds
target-arm: Add new AArch64CPUInfo base class and subclasses
target-arm: Pass DisasContext* to gen_set_pc_im()
target-arm: Fix target_ulong/uint32_t confusions
target-arm: Export cpu_env
target-arm: Extract the disas struct to a header file
...
Message-id: 1378839142-7726-1-git-send-email-peter.maydell@linaro.org
Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
Diffstat (limited to 'hw/display')
-rw-r--r-- | hw/display/pl110.c | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/hw/display/pl110.c b/hw/display/pl110.c index e79ab4b..790e510 100644 --- a/hw/display/pl110.c +++ b/hw/display/pl110.c @@ -94,23 +94,21 @@ static const VMStateDescription vmstate_pl110 = { static const unsigned char pl110_id[] = { 0x10, 0x11, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 }; -/* The Arm documentation (DDI0224C) says the CLDC on the Versatile board - has a different ID. However Linux only looks for the normal ID. */ -#if 0 -static const unsigned char pl110_versatile_id[] = -{ 0x93, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 }; -#else -#define pl110_versatile_id pl110_id -#endif - static const unsigned char pl111_id[] = { 0x11, 0x11, 0x24, 0x00, 0x0d, 0xf0, 0x05, 0xb1 }; + /* Indexed by pl110_version */ static const unsigned char *idregs[] = { pl110_id, - pl110_versatile_id, + /* The ARM documentation (DDI0224C) says the CLCDC on the Versatile board + * has a different ID (0x93, 0x10, 0x04, 0x00, ...). However the hardware + * itself has the same ID values as a stock PL110, and guests (in + * particular Linux) rely on this. We emulate what the hardware does, + * rather than what the docs claim it ought to do. + */ + pl110_id, pl111_id }; |